Backup before error handling refactoring
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jkwoo
312
UCOSIII/uC-LIB/Ports/ARM-Cortex-M3/RealView/lib_mem_a.asm
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312
UCOSIII/uC-LIB/Ports/ARM-Cortex-M3/RealView/lib_mem_a.asm
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;********************************************************************************************************
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; uC/LIB
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; CUSTOM LIBRARY MODULES
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;
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; (c) Copyright 2004-2011; Micrium, Inc.; Weston, FL
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;
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; All rights reserved. Protected by international copyright laws.
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;
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; uC/LIB is provided in source form to registered licensees ONLY. It is
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; illegal to distribute this source code to any third party unless you receive
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; written permission by an authorized Micrium representative. Knowledge of
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; the source code may NOT be used to develop a similar product.
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;
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; Please help us continue to provide the Embedded community with the finest
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; software available. Your honesty is greatly appreciated.
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;
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; You can contact us at www.micrium.com.
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;********************************************************************************************************
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;********************************************************************************************************
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;
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; STANDARD MEMORY OPERATIONS
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;
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; ARM-Cortex-M3
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; RealView Development Suite
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; RealView Microcontroller Development Kit (MDK)
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; ARM Developer Suite (ADS)
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; Keil uVision
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;
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; Filename : lib_mem_a.asm
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; Version : V1.36.01.00
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; Programmer(s) : JDH
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; BAN
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;********************************************************************************************************
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; Note(s) : (1) NO compiler-supplied standard library functions are used in library or product software.
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;
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; (a) ALL standard library functions are implemented in the custom library modules :
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;
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; (1) \<Custom Library Directory>\lib*.*
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;
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; (2) \<Custom Library Directory>\Ports\<cpu>\<compiler>\lib*_a.*
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;
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; where
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; <Custom Library Directory> directory path for custom library software
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; <cpu> directory name for specific processor (CPU)
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; <compiler> directory name for specific compiler
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;
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; (b) Product-specific library functions are implemented in individual products.
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;
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; (2) Assumes ARM CPU mode configured for Little Endian.
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;********************************************************************************************************
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;********************************************************************************************************
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; PUBLIC FUNCTIONS
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;********************************************************************************************************
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EXPORT Mem_Copy
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;********************************************************************************************************
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; CODE GENERATION DIRECTIVES
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;********************************************************************************************************
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AREA |.text|, CODE, READONLY, ALIGN=2
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THUMB
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REQUIRE8
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PRESERVE8
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;$PAGE
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;********************************************************************************************************
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; Mem_Copy()
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;
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; Description : Copy data octets from one buffer to another buffer.
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;
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; Argument(s) : pdest Pointer to destination memory buffer.
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;
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; psrc Pointer to source memory buffer.
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;
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; size Number of data buffer octets to copy.
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;
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; Return(s) : none.
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;
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; Caller(s) : Application.
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;
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; Note(s) : (1) Null copies allowed (i.e. 0-octet size).
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;
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; (2) Memory buffers NOT checked for overlapping.
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;
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; (3) Modulo arithmetic is used to determine whether a memory buffer starts on a 'CPU_ALIGN'
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; address boundary.
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;
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; (4) ARM Cortex-M3 processors use a subset of the ARM Thumb-2 instruction set which does
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; NOT support 16-bit conditional branch instructions but ONLY supports 8-bit conditional
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; branch instructions.
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;
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; Therefore, branches exceeding 8-bit, signed, relative offsets :
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;
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; (a) CANNOT be implemented with conditional branches; but ...
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; (b) MUST be implemented with non-conditional branches.
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;********************************************************************************************************
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; void Mem_Copy (void *pdest, ; ==> R0
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; void *psrc, ; ==> R1
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; CPU_SIZE_T size) ; ==> R2
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Mem_Copy
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CMP R0, #0
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BNE Mem_Copy_1
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BX LR ; return if pdest == NULL
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Mem_Copy_1
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CMP R1, #0
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BNE Mem_Copy_2
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BX LR ; return if psrc == NULL
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Mem_Copy_2
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CMP R2, #0
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BNE Mem_Copy_3
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BX LR ; return if size == 0
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Mem_Copy_3
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STMFD SP!, {R3-R12} ; save registers on stack
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;$PAGE
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Chk_Align_32 ; check if both dest & src 32-bit aligned
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AND R3, R0, #0x03
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AND R4, R1, #0x03
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CMP R3, R4
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BNE Chk_Align_16 ; not 32-bit aligned, check for 16-bit alignment
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RSB R3, R3, #0x04 ; compute 1-2-3 pre-copy bytes (to align to the next 32-bit boundary)
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AND R3, R3, #0x03
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Pre_Copy_1
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CMP R3, #1 ; copy 1-2-3 bytes (to align to the next 32-bit boundary)
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BCC Copy_32_1 ; start real 32-bit copy
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CMP R2, #1 ; check if any more data to copy
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BCS Pre_Copy_1_Cont
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B Mem_Copy_END ; no more data to copy (see Note #4b)
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Pre_Copy_1_Cont
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LDRB R4, [R1], #1
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STRB R4, [R0], #1
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SUB R3, R3, #1
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SUB R2, R2, #1
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B Pre_Copy_1
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Chk_Align_16 ; check if both dest & src 16-bit aligned
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AND R3, R0, #0x01
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AND R4, R1, #0x01
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CMP R3, R4
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BEQ Pre_Copy_2
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B Copy_08_1 ; not 16-bit aligned, start 8-bit copy (see Note #4b)
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Pre_Copy_2
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CMP R3, #1 ; copy 1 byte (to align to the next 16-bit boundary)
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BCC Copy_16_1 ; start real 16-bit copy
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LDRB R4, [R1], #1
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STRB R4, [R0], #1
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SUB R3, R3, #1
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SUB R2, R2, #1
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B Pre_Copy_2
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Copy_32_1
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CMP R2, #(04*10*09) ; Copy 9 chunks of 10 32-bit words (360 octets per loop)
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BCC Copy_32_2
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LDMIA R1!, {R3-R12}
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STMIA R0!, {R3-R12}
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LDMIA R1!, {R3-R12}
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STMIA R0!, {R3-R12}
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LDMIA R1!, {R3-R12}
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STMIA R0!, {R3-R12}
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LDMIA R1!, {R3-R12}
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STMIA R0!, {R3-R12}
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LDMIA R1!, {R3-R12}
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STMIA R0!, {R3-R12}
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LDMIA R1!, {R3-R12}
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STMIA R0!, {R3-R12}
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LDMIA R1!, {R3-R12}
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STMIA R0!, {R3-R12}
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LDMIA R1!, {R3-R12}
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STMIA R0!, {R3-R12}
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LDMIA R1!, {R3-R12}
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STMIA R0!, {R3-R12}
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SUB R2, R2, #(04*10*09)
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B Copy_32_1
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Copy_32_2
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CMP R2, #(04*10*01) ; Copy chunks of 10 32-bit words (40 octets per loop)
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BCC Copy_32_3
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LDMIA R1!, {R3-R12}
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STMIA R0!, {R3-R12}
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SUB R2, R2, #(04*10*01)
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B Copy_32_2
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Copy_32_3
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CMP R2, #(04*01*01) ; Copy remaining 32-bit words
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BCC Copy_16_1
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LDR R3, [R1], #4
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STR R3, [R0], #4
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SUB R2, R2, #(04*01*01)
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B Copy_32_3
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;$PAGE
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Copy_16_1
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CMP R2, #(02*01*16) ; Copy chunks of 16 16-bit words (32 bytes per loop)
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BCC Copy_16_2
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LDRH R3, [R1], #2
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STRH R3, [R0], #2
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LDRH R3, [R1], #2
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STRH R3, [R0], #2
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LDRH R3, [R1], #2
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STRH R3, [R0], #2
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LDRH R3, [R1], #2
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STRH R3, [R0], #2
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LDRH R3, [R1], #2
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STRH R3, [R0], #2
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LDRH R3, [R1], #2
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STRH R3, [R0], #2
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LDRH R3, [R1], #2
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STRH R3, [R0], #2
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LDRH R3, [R1], #2
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STRH R3, [R0], #2
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LDRH R3, [R1], #2
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STRH R3, [R0], #2
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LDRH R3, [R1], #2
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STRH R3, [R0], #2
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LDRH R3, [R1], #2
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STRH R3, [R0], #2
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LDRH R3, [R1], #2
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STRH R3, [R0], #2
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LDRH R3, [R1], #2
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STRH R3, [R0], #2
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LDRH R3, [R1], #2
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STRH R3, [R0], #2
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LDRH R3, [R1], #2
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STRH R3, [R0], #2
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LDRH R3, [R1], #2
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STRH R3, [R0], #2
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SUB R2, R2, #(02*01*16)
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B Copy_16_1
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Copy_16_2
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CMP R2, #(02*01*01) ; Copy remaining 16-bit words
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BCC Copy_08_1
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LDRH R3, [R1], #2
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STRH R3, [R0], #2
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SUB R2, R2, #(02*01*01)
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B Copy_16_2
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;$PAGE
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Copy_08_1
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CMP R2, #(01*01*16) ; Copy chunks of 16 8-bit words (16 bytes per loop)
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BCC Copy_08_2
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LDRB R3, [R1], #1
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STRB R3, [R0], #1
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LDRB R3, [R1], #1
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STRB R3, [R0], #1
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LDRB R3, [R1], #1
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STRB R3, [R0], #1
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LDRB R3, [R1], #1
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STRB R3, [R0], #1
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LDRB R3, [R1], #1
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STRB R3, [R0], #1
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LDRB R3, [R1], #1
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STRB R3, [R0], #1
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LDRB R3, [R1], #1
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STRB R3, [R0], #1
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LDRB R3, [R1], #1
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STRB R3, [R0], #1
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LDRB R3, [R1], #1
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STRB R3, [R0], #1
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LDRB R3, [R1], #1
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STRB R3, [R0], #1
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LDRB R3, [R1], #1
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STRB R3, [R0], #1
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LDRB R3, [R1], #1
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STRB R3, [R0], #1
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LDRB R3, [R1], #1
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STRB R3, [R0], #1
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LDRB R3, [R1], #1
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STRB R3, [R0], #1
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LDRB R3, [R1], #1
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STRB R3, [R0], #1
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LDRB R3, [R1], #1
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STRB R3, [R0], #1
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SUB R2, R2, #(01*01*16)
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B Copy_08_1
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Copy_08_2
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CMP R2, #(01*01*01) ; Copy remaining 8-bit words
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BCC Mem_Copy_END
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LDRB R3, [R1], #1
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STRB R3, [R0], #1
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SUB R2, R2, #(01*01*01)
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B Copy_08_2
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Mem_Copy_END
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LDMFD SP!, {R3-R12} ; restore registers from stack
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BX LR ; return
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END
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