244 lines
6.8 KiB
C
244 lines
6.8 KiB
C
/*
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registers.h - Battery management system based on bq769x0 for Arduino
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Copyright (C) 2015 Martin J ger (m.jaeger@posteo.de)
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU Lesser General Public License as
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published by the Free Software Foundation, either version 3 of the
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License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with this program. If not, see
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<http://www.gnu.org/licenses/>.
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*/
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/**
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******************************************************************************
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* @file bq76940_i2c.h
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* @author AMG Energy Solution Team
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* @version V1.0.0
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* @date 07-Feb-2022
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* @brief This file provides all the headers of bq76940 i2c functions.
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******************************************************************************
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* @attention
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2022 AMG</center></h2>
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __BQ76940_REG_H
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#define __BQ76940_REG_H
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/* Includes ------------------------------------------------------------------*/
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#include "hc32_ddl.h"
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/* Exported types ------------------------------------------------------------*/
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/* Exported defines ----------------------------------------------------------*/
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// register map
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#define SYS_STAT 0x00
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#define CELLBAL1 0x01
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#define CELLBAL2 0x02
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#define CELLBAL3 0x03
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#define SYS_CTRL1 0x04
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#define SYS_CTRL2 0x05
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#define PROTECT1 0x06
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#define PROTECT2 0x07
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#define PROTECT3 0x08
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#define OV_TRIP 0x09
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#define UV_TRIP 0x0A
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#define CC_CFG 0x0B
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#define VC1_HI_BYTE 0x0C
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#define VC1_LO_BYTE 0x0D
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#define VC2_HI_BYTE 0x0E
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#define VC2_LO_BYTE 0x0F
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#define VC3_HI_BYTE 0x10
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#define VC3_LO_BYTE 0x11
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#define VC4_HI_BYTE 0x12
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#define VC4_LO_BYTE 0x13
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#define VC5_HI_BYTE 0x14
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#define VC5_LO_BYTE 0x15
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#define VC6_HI_BYTE 0x16
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#define VC6_LO_BYTE 0x17
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#define VC7_HI_BYTE 0x18
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#define VC7_LO_BYTE 0x19
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#define VC8_HI_BYTE 0x1A
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#define VC8_LO_BYTE 0x1B
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#define VC9_HI_BYTE 0x1C
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#define VC9_LO_BYTE 0x1D
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#define VC10_HI_BYTE 0x1E
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#define VC10_LO_BYTE 0x1F
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#define VC11_HI_BYTE 0x20
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#define VC11_LO_BYTE 0x21
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#define VC12_HI_BYTE 0x22
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#define VC12_LO_BYTE 0x23
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#define VC13_HI_BYTE 0x24
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#define VC13_LO_BYTE 0x25
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#define VC14_HI_BYTE 0x26
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#define VC14_LO_BYTE 0x27
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#define VC15_HI_BYTE 0x28
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#define VC15_LO_BYTE 0x29
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#define BAT_HI_BYTE 0x2A
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#define BAT_LO_BYTE 0x2B
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#define TS1_HI_BYTE 0x2C
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#define TS1_LO_BYTE 0x2D
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#define TS2_HI_BYTE 0x2E
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#define TS2_LO_BYTE 0x2F
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#define TS3_HI_BYTE 0x30
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#define TS3_LO_BYTE 0x31
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#define CC_HI_BYTE 0x32
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#define CC_LO_BYTE 0x33
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#define ADCGAIN1 0x50
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#define ADCOFFSET 0x51
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#define ADCGAIN2 0x59
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// function from TI reference design
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#define LOW_BYTE(Data) (uint8_t)(0xff & Data)
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#define HIGH_BYTE(Data) (uint8_t)(0xff & (Data >> 8))
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// for bit clear operations of the SYS_STAT register
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#define STAT_CC_READY (0x80)
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#define STAT_DEVICE_XREADY (0x20)
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#define STAT_OVRD_ALERT (0x10)
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#define STAT_UV (0x08)
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#define STAT_OV (0x04)
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#define STAT_SCD (0x02)
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#define STAT_OCD (0x01)
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#define STAT_FLAGS (0x3F)
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/* Exported constants --------------------------------------------------------*/
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// maps for settings in protection registers
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const int SCD_delay_setting [4] =
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{ 70, 100, 200, 400 }; // us
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const int SCD_threshold_setting [8] =
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{ 44, 67, 89, 111, 133, 155, 178, 200 }; // mV
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const int OCD_delay_setting [8] =
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{ 8, 20, 40, 80, 160, 320, 640, 1280 }; // ms
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const int OCD_threshold_setting [16] =
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{ 17, 22, 28, 33, 39, 44, 50, 56, 61, 67, 72, 78, 83, 89, 94, 100 }; // mV
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const uint8_t UV_delay_setting [4] = { 1, 4, 8, 16 }; // s
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const uint8_t OV_delay_setting [4] = { 1, 2, 4, 8 }; // s
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typedef union regSYS_STAT {
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struct
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{
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uint8_t OCD :1;
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uint8_t SCD :1;
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uint8_t OV :1;
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uint8_t UV :1;
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uint8_t OVRD_ALERT :1;
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uint8_t DEVICE_XREADY :1;
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uint8_t WAKE :1;
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uint8_t CC_READY :1;
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} bits;
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uint8_t regByte;
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} regSYS_STAT_t;
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typedef union regSYS_CTRL1 {
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struct
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{
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uint8_t SHUT_B :1;
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uint8_t SHUT_A :1;
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uint8_t RSVD1 :1;
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uint8_t TEMP_SEL :1;
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uint8_t ADC_EN :1;
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uint8_t RSVD2 :2;
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uint8_t LOAD_PRESENT :1;
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} bits;
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uint8_t regByte;
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} regSYS_CTRL1_t;
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typedef union regSYS_CTRL2 {
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struct
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{
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uint8_t CHG_ON :1;
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uint8_t DSG_ON :1;
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uint8_t WAKE_T :2;
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uint8_t WAKE_EN :1;
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uint8_t CC_ONESHOT :1;
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uint8_t CC_EN :1;
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uint8_t DELAY_DIS :1;
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} bits;
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uint8_t regByte;
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} regSYS_CTRL2_t;
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typedef union regPROTECT1 {
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struct
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{
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uint8_t SCD_THRESH :3;
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uint8_t SCD_DELAY :2;
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uint8_t RSVD :2;
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uint8_t RSNS :1;
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} bits;
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uint8_t regByte;
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} regPROTECT1_t;
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typedef union regPROTECT2 {
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struct
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{
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uint8_t OCD_THRESH :4;
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uint8_t OCD_DELAY :3;
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uint8_t RSVD :1;
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} bits;
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uint8_t regByte;
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} regPROTECT2_t;
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typedef union regPROTECT3 {
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struct
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{
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uint8_t RSVD :4;
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uint8_t OV_DELAY :2;
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uint8_t UV_DELAY :2;
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} bits;
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uint8_t regByte;
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} regPROTECT3_t;
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typedef union regCELLBAL
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{
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struct
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{
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uint8_t RSVD :3;
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uint8_t CB5 :1;
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uint8_t CB4 :1;
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uint8_t CB3 :1;
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uint8_t CB2 :1;
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uint8_t CB1 :1;
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} bits;
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uint8_t regByte;
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} regCELLBAL_t;
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typedef union regVCELL
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{
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struct
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{
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uint8_t VC_HI;
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uint8_t VC_LO;
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} bytes;
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uint16_t regWord;
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} regVCELL_t;
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#endif
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/*******************(C)COPYRIGHT 2022 AMG ********************END OF FILE******/
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