91 lines
3.7 KiB
C
91 lines
3.7 KiB
C
#ifndef __SYS_H
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#define __SYS_H
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#include "stm32f4xx.h"
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//////////////////////////////////////////////////////////////////////////////////
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//This program is for educational purposes only, without the author's permission, may not be used for any other purpose
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//ALIENTEK STM32F407 Development Board
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//System clock initialize
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//Hot Atom@ALIENTEK
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//Technical Forum:www.openedv.com
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//Date created:2014/5/2
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//Version: V1.0
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//All rights reserved pirated reserved.
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//Copyright(C) Guangzhou wing electronic technology limited company 2014-2024
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//All rights reserved
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//********************************************************************************
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//Modify the description
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//No
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//////////////////////////////////////////////////////////////////////////////////
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//0,Not supported OS
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//1,Supported OS
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#define SYSTEM_SUPPORT_OS 1 //Defines whether the system folders supported OS
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//-Bit operation, 51 similar GPIO functions
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//Specific ideas, definitive guide to reference <<CM3 >> the fifth chapter (87 pages ~92 pages). M4 and M3, just register the address has changed.
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//IO operation macro definitions
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#define BITBAND(addr, bitnum) ((addr & 0xF0000000)+0x2000000+((addr &0xFFFFF)<<5)+(bitnum<<2))
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#define MEM_ADDR(addr) *((volatile unsigned long *)(addr))
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#define BIT_ADDR(addr, bitnum) MEM_ADDR(BITBAND(addr, bitnum))
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//IO port address mapping
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#define GPIOA_ODR_Addr (GPIOA_BASE+20) //0x40020014
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#define GPIOB_ODR_Addr (GPIOB_BASE+20) //0x40020414
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#define GPIOC_ODR_Addr (GPIOC_BASE+20) //0x40020814
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#define GPIOD_ODR_Addr (GPIOD_BASE+20) //0x40020C14
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#define GPIOE_ODR_Addr (GPIOE_BASE+20) //0x40021014
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#define GPIOF_ODR_Addr (GPIOF_BASE+20) //0x40021414
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#define GPIOG_ODR_Addr (GPIOG_BASE+20) //0x40021814
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#define GPIOH_ODR_Addr (GPIOH_BASE+20) //0x40021C14
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#define GPIOI_ODR_Addr (GPIOI_BASE+20) //0x40022014
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#define GPIOA_IDR_Addr (GPIOA_BASE+16) //0x40020010
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#define GPIOB_IDR_Addr (GPIOB_BASE+16) //0x40020410
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#define GPIOC_IDR_Addr (GPIOC_BASE+16) //0x40020810
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#define GPIOD_IDR_Addr (GPIOD_BASE+16) //0x40020C10
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#define GPIOE_IDR_Addr (GPIOE_BASE+16) //0x40021010
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#define GPIOF_IDR_Addr (GPIOF_BASE+16) //0x40021410
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#define GPIOG_IDR_Addr (GPIOG_BASE+16) //0x40021810
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#define GPIOH_IDR_Addr (GPIOH_BASE+16) //0x40021C10
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#define GPIOI_IDR_Addr (GPIOI_BASE+16) //0x40022010
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//IO operation, only a single IO!
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//Ensure that the value of n is less than 16!
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#define PAout(n) BIT_ADDR(GPIOA_ODR_Addr,n) //Output
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#define PAin(n) BIT_ADDR(GPIOA_IDR_Addr,n) //Input
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#define PBout(n) BIT_ADDR(GPIOB_ODR_Addr,n) //Output
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#define PBin(n) BIT_ADDR(GPIOB_IDR_Addr,n) //Input
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#define PCout(n) BIT_ADDR(GPIOC_ODR_Addr,n) //Output
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#define PCin(n) BIT_ADDR(GPIOC_IDR_Addr,n) //Input
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#define PDout(n) BIT_ADDR(GPIOD_ODR_Addr,n) //Output
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#define PDin(n) BIT_ADDR(GPIOD_IDR_Addr,n) //Input
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#define PEout(n) BIT_ADDR(GPIOE_ODR_Addr,n) //Output
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#define PEin(n) BIT_ADDR(GPIOE_IDR_Addr,n) //Input
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#define PFout(n) BIT_ADDR(GPIOF_ODR_Addr,n) //Output
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#define PFin(n) BIT_ADDR(GPIOF_IDR_Addr,n) //Input
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#define PGout(n) BIT_ADDR(GPIOG_ODR_Addr,n) //Output
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#define PGin(n) BIT_ADDR(GPIOG_IDR_Addr,n) //Input
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#define PHout(n) BIT_ADDR(GPIOH_ODR_Addr,n) //Output
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#define PHin(n) BIT_ADDR(GPIOH_IDR_Addr,n) //Input
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#define PIout(n) BIT_ADDR(GPIOI_ODR_Addr,n) //Output
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#define PIin(n) BIT_ADDR(GPIOI_IDR_Addr,n) //Input
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//Following is a compilation of a function
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void WFI_SET(void); //WFI instruction is executed
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void INTX_DISABLE(void);//Disable all interrupts
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void INTX_ENABLE(void); //Enable all the interrupts
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void MSR_MSP(u32 addr); //Setting the stack address
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void Sys_Soft_Reset(void);
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#endif
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