286 lines
10 KiB
C
286 lines
10 KiB
C
#include "adc.h"
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#include "includes.h"
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#include "delay.h"
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//////////////////////////////////////////////////////////////////////////////////
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//This program is for educational purposes only, without the author's permission, may not be used for any other purpose
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//ALIENTEK STM32F407 Development Board
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//ADC driver code
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//Hot Atomic @ALIENTEK
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//Forum: www.openedv.com
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//Date created: 2015/9/1
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//Version: V1.0
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//All rights reserved pirated reserved.
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//Copyright(C) Guangzhou wing electronic technology limited company 2014-2024
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//All rights reserved
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//////////////////////////////////////////////////////////////////////////////////
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#define ADC1_DR_Address ((u32)0x4001204C)
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#define ADC2_DR_Address ((u32)0x4001214C)
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#define ADC3_DR_Address ((u32)0x4001224C)
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// DMA Buffer
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u16 Adc1DmaBuff[ADC1_DMA_BUFFER_MAX][ADC1_CH_MAX];
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u16 Adc2DmaBuff[ADC2_DMA_BUFFER_MAX][ADC2_CH_MAX];
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// DMA Buff Flag
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static u8 DmaBuffFlag = false;
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//Temp port Initialize
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void Temp_Port_Init(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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DMA_InitTypeDef DMA_InitStructure;
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ADC_CommonInitTypeDef ADC_CommonInitStructure;
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ADC_InitTypeDef ADC_InitStructure;
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
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/* ADC Channel 5, 4, 3, 2, 1, 0 config --------------------------------------------------------*/
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/* Configure
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PA.0(ADC Channel 0)
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PA.1(ADC Channel 1)
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PA.2(ADC Channel 2)
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PA.3(ADC Channel 3)
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PA.4(ADC Channel 4)
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PA.5(ADC Channel 5)
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as analog input
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-------------------------*/
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GPIO_InitStructure.GPIO_Pin = TEMP1_PIN
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| TEMP2_PIN
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| TEMP3_PIN
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| TEMP4_PIN
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| TEMP5_PIN
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| TEMP6_PIN
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| TEMP7_PIN
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| TEMP8_PIN
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;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
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GPIO_Init(TEMP_PORT, &GPIO_InitStructure);
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/* DMA2 Stream0 channel0 configuration */
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DMA_DeInit(DMA2_Stream0);
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DMA_InitStructure.DMA_Channel = DMA_Channel_0;
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DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)ADC1_DR_Address;
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DMA_InitStructure.DMA_Memory0BaseAddr = (u32)Adc1DmaBuff;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
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DMA_InitStructure.DMA_BufferSize = (ADC1_CH_MAX * ADC1_DMA_BUFFER_MAX);
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
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DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
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DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
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DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
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DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
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DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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DMA_Init(DMA2_Stream0, &DMA_InitStructure);
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/* dma2 int */ // TC: Transfer complete, HT : Harf transfer
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// DMA_ITConfig(DMA2_Stream0, DMA_IT_TC, ENABLE);
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/* Enable DMA2 Stream0 */
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DMA_Cmd(DMA2_Stream0, ENABLE);
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/* ADC Common Init **********************************************************/
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ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent;
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ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2;
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ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
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ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
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ADC_CommonInit(&ADC_CommonInitStructure);
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/* ADC1 configuration ------------------------------------------------------*/
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ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
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ADC_InitStructure.ADC_ScanConvMode = ENABLE;
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ADC_InitStructure.ADC_ContinuousConvMode = ENABLE;
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ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;
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ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
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ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
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ADC_InitStructure.ADC_NbrOfConversion = ADC1_CH_MAX;
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ADC_Init(ADC1, &ADC_InitStructure);
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/* Enable ADC1 DMA */
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ADC_DMACmd(ADC1, ENABLE);
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/* ADC1 regular channel configuration */
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ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 1, ADC_SampleTime_144Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 2, ADC_SampleTime_144Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_3, 3, ADC_SampleTime_144Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_2, 4, ADC_SampleTime_144Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_1, 5, ADC_SampleTime_144Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 6, ADC_SampleTime_144Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_7, 7, ADC_SampleTime_144Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_6, 8, ADC_SampleTime_144Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_TempSensor, 9, ADC_SampleTime_480Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_Vrefint , 10, ADC_SampleTime_480Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_Vbat , 11, ADC_SampleTime_480Cycles);
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/* Enable TempSensor and Vrefint channels : channel16 and channel17 */
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ADC_TempSensorVrefintCmd(ENABLE);
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ADC_VBATCmd(ENABLE);
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/* Enable DMA request after last transfer (Single-ADC mode) */
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ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE);
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/* Enable ADC1 */
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ADC_Cmd(ADC1, ENABLE);
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/* Start ADC1 Software Conversion */
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ADC_SoftwareStartConv(ADC1);
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}
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void DMA2_Stream0_IRQHandler(void)
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{
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OSIntEnter();
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/* Test on DMA Stream Transfer Complete interrupt */
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if(DMA_GetITStatus(DMA2_Stream0, DMA_IT_TCIF0))
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{
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/* Clear DMA Stream Transfer Complete interrupt pending bit */
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DMA_ClearITPendingBit(DMA2_Stream0, DMA_IT_TCIF0);
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}
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OSIntExit(); //Exit interrupt
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}
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u16 AvgAdc1DmaValue(u16 ch)
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{
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u32 sum = 0;
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for (int i = 0; i < ADC1_DMA_BUFFER_MAX; i++)
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sum += Adc1DmaBuff[i][ch];
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return (u16)(sum / ADC1_DMA_BUFFER_MAX);
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}
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//VI(Voltage and Current) port Initialize
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void VI_Port_Init(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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DMA_InitTypeDef DMA_InitStructure;
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ADC_CommonInitTypeDef ADC_CommonInitStructure;
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ADC_InitTypeDef ADC_InitStructure;
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC2, ENABLE);
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
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/* ADC Channel 14, 15 config --------------------------------------------------------*/
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/* Configure PC.4(ADC Channel 14) PC.5(ADC Channel 15) as analog input --------------*/
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GPIO_InitStructure.GPIO_Pin = DSG_CURR_PIN | CHG_CURR_PIN;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
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GPIO_Init(CURRENT_PORT, &GPIO_InitStructure);
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/* DMA2 Stream2 channel2 configuration */
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DMA_DeInit(DMA2_Stream2);
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DMA_InitStructure.DMA_Channel = DMA_Channel_1;
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DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)ADC2_DR_Address;
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DMA_InitStructure.DMA_Memory0BaseAddr = (u32)Adc2DmaBuff;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
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DMA_InitStructure.DMA_BufferSize = (ADC2_CH_MAX * ADC2_DMA_BUFFER_MAX);
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
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DMA_InitStructure.DMA_Priority = DMA_Priority_High;
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DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
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DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
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DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
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DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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DMA_Init(DMA2_Stream2, &DMA_InitStructure);
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/* dma2 int */ // TC: Transfer complete, HT : Harf transfer
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DMA_ITConfig(DMA2_Stream2, DMA_IT_TC, ENABLE);
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/* Enable DMA2 Stream1 */
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DMA_Cmd(DMA2_Stream2, ENABLE);
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/* ADC Common Init ---------------------------------------------------------*/
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ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent;
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ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2;
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ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
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ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
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ADC_CommonInit(&ADC_CommonInitStructure);
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/* ADC3 configuration ------------------------------------------------------*/
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ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
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ADC_InitStructure.ADC_ScanConvMode = ENABLE;
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ADC_InitStructure.ADC_ContinuousConvMode = ENABLE;
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ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;
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ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
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ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
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ADC_InitStructure.ADC_NbrOfConversion = ADC2_CH_MAX;
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ADC_Init(ADC2, &ADC_InitStructure);
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/* Enable ADC2 DMA */
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ADC_DMACmd(ADC2, ENABLE);
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/* ADC3 regular channel configuration */
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ADC_RegularChannelConfig(ADC2, ADC_Channel_15, 1, ADC_SampleTime_3Cycles);
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ADC_RegularChannelConfig(ADC2, ADC_Channel_14, 2, ADC_SampleTime_3Cycles);
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/* Enable DMA request after last transfer (Single-ADC mode) */
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ADC_DMARequestAfterLastTransferCmd(ADC2, ENABLE);
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/* Enable ADC1 */
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ADC_Cmd(ADC2, ENABLE);
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/* Start ADC1 Software Conversion */
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ADC_SoftwareStartConv(ADC2);
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}
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void DMA2_Stream2_IRQHandler(void)
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{
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OSIntEnter(); // Enter interrupt
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/* Test on DMA Stream Transfer Complete interrupt */
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if (DMA_GetITStatus(DMA2_Stream2, DMA_IT_TCIF2))
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{
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DmaBuffFlag = true;
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/* Clear DMA Stream Transfer Complete interrupt pending bit */
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DMA_ClearITPendingBit(DMA2_Stream2, DMA_IT_TCIF2);
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}
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OSIntExit(); // Exit interrupt
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}
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u16 GetDmaBufferFlag(void)
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{
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return DmaBuffFlag;
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}
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void ResetDmaBufferFlag(void)
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{
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DmaBuffFlag = false;
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}
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u16 AvgAdc2DmaValue(u16 ch)
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{
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__IO u32 sum = 0;
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for (int i = 0; i < ADC2_DMA_BUFFER_MAX; i++)
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sum += Adc2DmaBuff[i][ch] * 10;
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return (u16)(sum / ADC2_DMA_BUFFER_MAX);
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}
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#ifdef CONSOLE_DEBUG
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void DisplayAdc2DmaBufferValue(u8 ch)
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{
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for (int i = 0; i < ADC2_DMA_BUFFER_MAX; i++)
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{
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printf("%d\r\n", Adc2DmaBuff[i][ch]);
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delay_os_ms(1);
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}
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}
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#endif
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