#include "adc.h" #include "includes.h" #include "delay.h" ////////////////////////////////////////////////////////////////////////////////// //This program is for educational purposes only, without the author's permission, may not be used for any other purpose //ALIENTEK STM32F407 Development Board //ADC driver code //Hot Atomic @ALIENTEK //Forum: www.openedv.com //Date created: 2015/9/1 //Version: V1.0 //All rights reserved pirated reserved. //Copyright(C) Guangzhou wing electronic technology limited company 2014-2024 //All rights reserved ////////////////////////////////////////////////////////////////////////////////// #define ADC1_DR_Address ((u32)0x4001204C) #define ADC2_DR_Address ((u32)0x4001214C) #define ADC3_DR_Address ((u32)0x4001224C) // DMA Buffer u16 Adc1DmaBuff[ADC1_DMA_BUFFER_MAX][ADC1_CH_MAX]; u16 Adc2DmaBuff[ADC2_DMA_BUFFER_MAX][ADC2_CH_MAX]; // DMA Buff Flag static u8 DmaBuffFlag = false; //Temp port Initialize void Temp_Port_Init(void) { GPIO_InitTypeDef GPIO_InitStructure; DMA_InitTypeDef DMA_InitStructure; ADC_CommonInitTypeDef ADC_CommonInitStructure; ADC_InitTypeDef ADC_InitStructure; RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE); RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); /* ADC Channel 5, 4, 3, 2, 1, 0 config --------------------------------------------------------*/ /* Configure PA.0(ADC Channel 0) PA.1(ADC Channel 1) PA.2(ADC Channel 2) PA.3(ADC Channel 3) PA.4(ADC Channel 4) PA.5(ADC Channel 5) as analog input -------------------------*/ GPIO_InitStructure.GPIO_Pin = TEMP1_PIN | TEMP2_PIN | TEMP3_PIN | TEMP4_PIN | TEMP5_PIN | TEMP6_PIN | TEMP7_PIN | TEMP8_PIN ; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_Init(TEMP_PORT, &GPIO_InitStructure); /* DMA2 Stream0 channel0 configuration */ DMA_DeInit(DMA2_Stream0); DMA_InitStructure.DMA_Channel = DMA_Channel_0; DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)ADC1_DR_Address; DMA_InitStructure.DMA_Memory0BaseAddr = (u32)Adc1DmaBuff; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; DMA_InitStructure.DMA_BufferSize = (ADC1_CH_MAX * ADC1_DMA_BUFFER_MAX); DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_Init(DMA2_Stream0, &DMA_InitStructure); /* dma2 int */ // TC: Transfer complete, HT : Harf transfer // DMA_ITConfig(DMA2_Stream0, DMA_IT_TC, ENABLE); /* Enable DMA2 Stream0 */ DMA_Cmd(DMA2_Stream0, ENABLE); /* ADC Common Init **********************************************************/ ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent; ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2; ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles; ADC_CommonInit(&ADC_CommonInitStructure); /* ADC1 configuration ------------------------------------------------------*/ ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; ADC_InitStructure.ADC_ScanConvMode = ENABLE; ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStructure.ADC_NbrOfConversion = ADC1_CH_MAX; ADC_Init(ADC1, &ADC_InitStructure); /* Enable ADC1 DMA */ ADC_DMACmd(ADC1, ENABLE); /* ADC1 regular channel configuration */ ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 1, ADC_SampleTime_144Cycles); ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 2, ADC_SampleTime_144Cycles); ADC_RegularChannelConfig(ADC1, ADC_Channel_3, 3, ADC_SampleTime_144Cycles); ADC_RegularChannelConfig(ADC1, ADC_Channel_2, 4, ADC_SampleTime_144Cycles); ADC_RegularChannelConfig(ADC1, ADC_Channel_1, 5, ADC_SampleTime_144Cycles); ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 6, ADC_SampleTime_144Cycles); ADC_RegularChannelConfig(ADC1, ADC_Channel_7, 7, ADC_SampleTime_144Cycles); ADC_RegularChannelConfig(ADC1, ADC_Channel_6, 8, ADC_SampleTime_144Cycles); ADC_RegularChannelConfig(ADC1, ADC_Channel_TempSensor, 9, ADC_SampleTime_480Cycles); ADC_RegularChannelConfig(ADC1, ADC_Channel_Vrefint , 10, ADC_SampleTime_480Cycles); ADC_RegularChannelConfig(ADC1, ADC_Channel_Vbat , 11, ADC_SampleTime_480Cycles); /* Enable TempSensor and Vrefint channels : channel16 and channel17 */ ADC_TempSensorVrefintCmd(ENABLE); ADC_VBATCmd(ENABLE); /* Enable DMA request after last transfer (Single-ADC mode) */ ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE); /* Enable ADC1 */ ADC_Cmd(ADC1, ENABLE); /* Start ADC1 Software Conversion */ ADC_SoftwareStartConv(ADC1); } void DMA2_Stream0_IRQHandler(void) { OSIntEnter(); /* Test on DMA Stream Transfer Complete interrupt */ if(DMA_GetITStatus(DMA2_Stream0, DMA_IT_TCIF0)) { /* Clear DMA Stream Transfer Complete interrupt pending bit */ DMA_ClearITPendingBit(DMA2_Stream0, DMA_IT_TCIF0); } OSIntExit(); //Exit interrupt } u16 AvgAdc1DmaValue(u16 ch) { u32 sum = 0; for (int i = 0; i < ADC1_DMA_BUFFER_MAX; i++) sum += Adc1DmaBuff[i][ch]; return (u16)(sum / ADC1_DMA_BUFFER_MAX); } //VI(Voltage and Current) port Initialize void VI_Port_Init(void) { GPIO_InitTypeDef GPIO_InitStructure; DMA_InitTypeDef DMA_InitStructure; ADC_CommonInitTypeDef ADC_CommonInitStructure; ADC_InitTypeDef ADC_InitStructure; RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC2, ENABLE); RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); /* ADC Channel 14, 15 config --------------------------------------------------------*/ /* Configure PC.4(ADC Channel 14) PC.5(ADC Channel 15) as analog input --------------*/ GPIO_InitStructure.GPIO_Pin = DSG_CURR_PIN | CHG_CURR_PIN; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_Init(CURRENT_PORT, &GPIO_InitStructure); /* DMA2 Stream2 channel2 configuration */ DMA_DeInit(DMA2_Stream2); DMA_InitStructure.DMA_Channel = DMA_Channel_1; DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)ADC2_DR_Address; DMA_InitStructure.DMA_Memory0BaseAddr = (u32)Adc2DmaBuff; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; DMA_InitStructure.DMA_BufferSize = (ADC2_CH_MAX * ADC2_DMA_BUFFER_MAX); DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_Init(DMA2_Stream2, &DMA_InitStructure); /* dma2 int */ // TC: Transfer complete, HT : Harf transfer DMA_ITConfig(DMA2_Stream2, DMA_IT_TC, ENABLE); /* Enable DMA2 Stream1 */ DMA_Cmd(DMA2_Stream2, ENABLE); /* ADC Common Init ---------------------------------------------------------*/ ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent; ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2; ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles; ADC_CommonInit(&ADC_CommonInitStructure); /* ADC3 configuration ------------------------------------------------------*/ ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; ADC_InitStructure.ADC_ScanConvMode = ENABLE; ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStructure.ADC_NbrOfConversion = ADC2_CH_MAX; ADC_Init(ADC2, &ADC_InitStructure); /* Enable ADC2 DMA */ ADC_DMACmd(ADC2, ENABLE); /* ADC3 regular channel configuration */ ADC_RegularChannelConfig(ADC2, ADC_Channel_15, 1, ADC_SampleTime_3Cycles); ADC_RegularChannelConfig(ADC2, ADC_Channel_14, 2, ADC_SampleTime_3Cycles); /* Enable DMA request after last transfer (Single-ADC mode) */ ADC_DMARequestAfterLastTransferCmd(ADC2, ENABLE); /* Enable ADC1 */ ADC_Cmd(ADC2, ENABLE); /* Start ADC1 Software Conversion */ ADC_SoftwareStartConv(ADC2); } void DMA2_Stream2_IRQHandler(void) { OSIntEnter(); // Enter interrupt /* Test on DMA Stream Transfer Complete interrupt */ if (DMA_GetITStatus(DMA2_Stream2, DMA_IT_TCIF2)) { DmaBuffFlag = true; /* Clear DMA Stream Transfer Complete interrupt pending bit */ DMA_ClearITPendingBit(DMA2_Stream2, DMA_IT_TCIF2); } OSIntExit(); // Exit interrupt } u16 GetDmaBufferFlag(void) { return DmaBuffFlag; } void ResetDmaBufferFlag(void) { DmaBuffFlag = false; } u16 AvgAdc2DmaValue(u16 ch) { __IO u32 sum = 0; for (int i = 0; i < ADC2_DMA_BUFFER_MAX; i++) sum += Adc2DmaBuff[i][ch] * 10; return (u16)(sum / ADC2_DMA_BUFFER_MAX); } #ifdef CONSOLE_DEBUG void DisplayAdc2DmaBufferValue(u8 ch) { for (int i = 0; i < ADC2_DMA_BUFFER_MAX; i++) { printf("%d\r\n", Adc2DmaBuff[i][ch]); delay_os_ms(1); } } #endif