feat: KT mBMS 펌웨어 3종(HW1/2/3) 및 통합 빌드 환경 초기 커밋 (V4.0.0.1)

mBMS_APP_V3117/SYSTEM/sys/sys.c

@@ -0,0 +1,50 @@
+#include "sys.h"  
+//////////////////////////////////////////////////////////////////////////////////	 
+//This program is for educational purposes only, without the author's permission, may not be used for any other purpose
+//ALIENTEK STM32F407 Development Board
+//System clock initialize	
+///GPIO set clock set/break management
+//Hot Atom@ALIENTEK
+//Technical Forum:www.openedv.com
+//Date created:2014/5/2
+//Version: V1.0
+//All rights reserved pirated reserved.
+//Copyright(C) Guangzhou wing electronic technology limited company 2014-2024
+//All rights reserved
+//********************************************************************************
+//Modify the description
+//No
+//////////////////////////////////////////////////////////////////////////////////  
+
+
+//THUMB instructions compilation is not supported inline
+//Uses the following methods to achieve implementation of Assembly instructions WFI  
+__asm void WFI_SET(void)
+{
+	WFI;		  
+}
+//Diable all interrupts (but not fault and NMI interrupt)
+__asm void INTX_DISABLE(void)
+{
+	CPSID   I
+	BX      LR	  
+}
+//Enable all the interrupts
+__asm void INTX_ENABLE(void)
+{
+	CPSIE   I
+	BX      LR  
+}
+//Setting the stack address
+//addr:The top of the stack address
+__asm void MSR_MSP(u32 addr) 
+{
+	MSR MSP, r0 			//set Main Stack value
+	BX r14
+}
+
+//Soft reset
+void Sys_Soft_Reset(void)
+{   
+	SCB->AIRCR =0X05FA0000|(u32)0x04;	  
+} 		 

mBMS_APP_V3117/SYSTEM/sys/sys.h

@@ -0,0 +1,90 @@
+#ifndef __SYS_H
+#define __SYS_H	 
+#include "stm32f4xx.h" 
+//////////////////////////////////////////////////////////////////////////////////	 
+//This program is for educational purposes only, without the author's permission, may not be used for any other purpose
+//ALIENTEK STM32F407 Development Board
+//System clock initialize	
+//Hot Atom@ALIENTEK
+//Technical Forum:www.openedv.com
+//Date created:2014/5/2
+//Version: V1.0
+//All rights reserved pirated reserved.
+//Copyright(C) Guangzhou wing electronic technology limited company 2014-2024
+//All rights reserved
+//********************************************************************************
+//Modify the description
+//No
+////////////////////////////////////////////////////////////////////////////////// 
+
+
+//0,Not supported OS
+//1,Supported OS
+#define SYSTEM_SUPPORT_OS		1		//Defines whether the system folders supported OS
+																	    
+	 
+//-Bit operation, 51 similar GPIO functions
+//Specific ideas, definitive guide to reference <<CM3 >> the fifth chapter (87 pages ~92 pages). M4 and M3, just register the address has changed.
+//IO operation macro definitions
+#define BITBAND(addr, bitnum) ((addr & 0xF0000000)+0x2000000+((addr &0xFFFFF)<<5)+(bitnum<<2)) 
+#define MEM_ADDR(addr)  *((volatile unsigned long  *)(addr)) 
+#define BIT_ADDR(addr, bitnum)   MEM_ADDR(BITBAND(addr, bitnum)) 
+//IO port address mapping
+#define GPIOA_ODR_Addr    (GPIOA_BASE+20) //0x40020014
+#define GPIOB_ODR_Addr    (GPIOB_BASE+20) //0x40020414 
+#define GPIOC_ODR_Addr    (GPIOC_BASE+20) //0x40020814 
+#define GPIOD_ODR_Addr    (GPIOD_BASE+20) //0x40020C14 
+#define GPIOE_ODR_Addr    (GPIOE_BASE+20) //0x40021014 
+#define GPIOF_ODR_Addr    (GPIOF_BASE+20) //0x40021414    
+#define GPIOG_ODR_Addr    (GPIOG_BASE+20) //0x40021814   
+#define GPIOH_ODR_Addr    (GPIOH_BASE+20) //0x40021C14    
+#define GPIOI_ODR_Addr    (GPIOI_BASE+20) //0x40022014     
+
+#define GPIOA_IDR_Addr    (GPIOA_BASE+16) //0x40020010 
+#define GPIOB_IDR_Addr    (GPIOB_BASE+16) //0x40020410 
+#define GPIOC_IDR_Addr    (GPIOC_BASE+16) //0x40020810 
+#define GPIOD_IDR_Addr    (GPIOD_BASE+16) //0x40020C10 
+#define GPIOE_IDR_Addr    (GPIOE_BASE+16) //0x40021010 
+#define GPIOF_IDR_Addr    (GPIOF_BASE+16) //0x40021410 
+#define GPIOG_IDR_Addr    (GPIOG_BASE+16) //0x40021810 
+#define GPIOH_IDR_Addr    (GPIOH_BASE+16) //0x40021C10 
+#define GPIOI_IDR_Addr    (GPIOI_BASE+16) //0x40022010 
+ 
+//IO operation, only a single IO!
+//Ensure that the value of n is less than 16!
+#define PAout(n)   BIT_ADDR(GPIOA_ODR_Addr,n)  //Output 
+#define PAin(n)    BIT_ADDR(GPIOA_IDR_Addr,n)  //Input 
+
+#define PBout(n)   BIT_ADDR(GPIOB_ODR_Addr,n)  //Output 
+#define PBin(n)    BIT_ADDR(GPIOB_IDR_Addr,n)  //Input 
+
+#define PCout(n)   BIT_ADDR(GPIOC_ODR_Addr,n)  //Output 
+#define PCin(n)    BIT_ADDR(GPIOC_IDR_Addr,n)  //Input 
+
+#define PDout(n)   BIT_ADDR(GPIOD_ODR_Addr,n)  //Output 
+#define PDin(n)    BIT_ADDR(GPIOD_IDR_Addr,n)  //Input 
+
+#define PEout(n)   BIT_ADDR(GPIOE_ODR_Addr,n)  //Output 
+#define PEin(n)    BIT_ADDR(GPIOE_IDR_Addr,n)  //Input
+
+#define PFout(n)   BIT_ADDR(GPIOF_ODR_Addr,n)  //Output 
+#define PFin(n)    BIT_ADDR(GPIOF_IDR_Addr,n)  //Input
+
+#define PGout(n)   BIT_ADDR(GPIOG_ODR_Addr,n)  //Output 
+#define PGin(n)    BIT_ADDR(GPIOG_IDR_Addr,n)  //Input
+
+#define PHout(n)   BIT_ADDR(GPIOH_ODR_Addr,n)  //Output 
+#define PHin(n)    BIT_ADDR(GPIOH_IDR_Addr,n)  //Input
+
+#define PIout(n)   BIT_ADDR(GPIOI_ODR_Addr,n)  //Output 
+#define PIin(n)    BIT_ADDR(GPIOI_IDR_Addr,n)  //Input
+
+//Following is a compilation of a function
+void WFI_SET(void);		//WFI instruction is executed
+void INTX_DISABLE(void);//Disable all interrupts
+void INTX_ENABLE(void);	//Enable all the interrupts
+void MSR_MSP(u32 addr);	//Setting the stack address 
+
+void Sys_Soft_Reset(void);
+
+#endif