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feat: KT mBMS 펌웨어 3종(HW1/2/3) 및 통합 빌드 환경 초기 커밋 (V4.0.0.1)

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jkwoo
2026-11-05 14:31:31 +09:00
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APP_R3221/midware/sd_card/inc/sd_card.h Normal file
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/*******************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co., Ltd. All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co., Ltd. ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACCOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file sd_card.h
**
** A detailed description is available at
** @link SdiocGroup SDIOC description @endlink
**
** - 2018-11-15 1.0 Hongjh First version for Device Driver Library of SDIOC.
**
******************************************************************************/
#ifndef __SD_CARD_H__
#define __SD_CARD_H__
/*******************************************************************************
* Include files
******************************************************************************/
#include "sdmmc_cmd.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
*******************************************************************************
** \defgroup SdiocGroup Secure Digital Input and Output Controller(SDIOC)
**
******************************************************************************/
//@{
/*******************************************************************************
* Global type definitions ('typedef')
******************************************************************************/
/**
*******************************************************************************
** \brief SD Card version definition
**
******************************************************************************/
typedef enum en_sd_card_version
{
SdCardVer1x = 0u, ///< SD Card version: 1.x
SdCardVer2x = 1u, ///< SD Card version: 2.x
} en_sd_card_version_t;
/**
*******************************************************************************
** \brief SD Card device Read/Write mode
**
******************************************************************************/
typedef enum en_sd_card_device_mode
{
SdCardPollingMode = 0u, ///< Polling mode transfer
SdCardDmaMode = 1u, ///< DMA mode transfer
} en_sd_card_device_mode_t;
/**
*******************************************************************************
** \brief SD Card Information Structure definition
**
******************************************************************************/
typedef struct stc_sd_card_info
{
uint32_t u32CardType; ///< Specifies the card Type
uint32_t u32CardVersion; ///< Specifies the card version
uint32_t u32Class; ///< Specifies the class of the card class
uint32_t u32RelCardAddr; ///< Specifies the Relative Card Address
uint32_t u32BlockNbr; ///< Specifies the Card Capacity in blocks
uint32_t u32BlockSize; ///< Specifies one block size in bytes
uint32_t u32LogBlockNbr; ///< Specifies the Card logical Capacity in blocks
uint32_t u32LogBlockSize; ///< Specifies logical block size in bytes
} stc_sd_card_info_t;
/**
*******************************************************************************
** \brief CSD Register ver1.0(for Standard Capacity Card)
**
******************************************************************************/
typedef struct stc_sdcard_csd_v1
{
/* Byte 1 */
uint8_t RESERVE1 : 2;
uint8_t FILE_FORMAT : 2;
uint8_t TMP_WRITE_PROTECT : 1;
uint8_t PERM_WRITE_PROTECT : 1;
uint8_t COPY : 1;
uint8_t FILE_FORMAT_GRP : 1;
/* Byte 2 */
uint8_t RESERVE2 : 5;
uint8_t WRITE_BL_PARTIAL : 1;
uint8_t WRITE_BL_LEN1 : 2;
/* Byte 3 */
uint8_t WRITE_BL_LEN2 : 2;
uint8_t R2W_FACTOR : 3;
uint8_t RESERVE3 : 2;
uint8_t WP_GRP_ENABLE : 1;
/* Byte 4 */
uint8_t WP_GRP_SIZE : 7;
uint8_t SECTOR_SIZE1 : 1;
/* Byte 5 */
uint8_t SECTOR_SIZE2 : 6;
uint8_t ERASE_BLK_EN : 1;
uint8_t C_SIZE_MULTI1 : 1;
/* Byte 6 */
uint8_t C_SIZE_MULTI2 : 2;
uint8_t CDD_W_CURR_MAX : 3;
uint8_t CDD_W_CURR_MIN : 3;
/* Byte 7 */
uint8_t VDD_R_CURR_MAX : 3;
uint8_t VDD_R_CURR_MIN : 3;
uint8_t C_SIZE1 : 2;
/* Byte 8 */
uint8_t C_SIZE2 : 8;
/* Byte 9 */
uint8_t C_SIZE3 : 2;
uint8_t RESERVED4 : 2;
uint8_t DSR_IMP : 1;
uint8_t READ_BLK_MISALIGH : 1;
uint8_t WRITE_BLK_MISALIGN : 1;
uint8_t READ_BL_PARTIAL : 1;
/* Byte 10 */
uint8_t READ_BL_LEN : 4;
uint8_t CCC1 : 4;
/* Byte 11 */
uint8_t CCC2 : 8;
/* Byte 12 */
uint8_t TRAN_SPEED : 8;
/* Byte 13 */
uint8_t NSAC : 8;
/* Byte 14 */
uint8_t TAAC : 8;
/* Byte 15 */
uint8_t RESERVE5 : 6;
uint8_t CSD_STRUCTURE : 2;
}stc_sdcard_csd_v1_t;
/**
*******************************************************************************
** \brief CSD Register ver2.0(for High Capacity Card)
**
******************************************************************************/
typedef struct stc_sdcard_csd_v2
{
/* Byte 1 */
uint8_t RESERVED1 : 2;
uint8_t FILE_FORMAT : 2;
uint8_t TMP_WRITE_PROTECT : 1;
uint8_t PERM_WRITE_PROTECT : 1;
uint8_t COPY : 1;
uint8_t FILE_FORMAT_GRP : 1;
/* Byte 2 */
uint8_t RESERVED2 : 5;
uint8_t WRITE_BL_PARTIAL : 1;
uint8_t WRITE_BL_LEN1 : 2;
/* Byte 3 */
uint8_t WRITE_BL_LEN2 : 2;
uint8_t R2W_FACTOR : 3;
uint8_t RESERVED3 : 2;
uint8_t WP_GRP_ENABLE : 1;
/* Byte 4 */
uint8_t WP_GRP_SIZE : 7;
uint8_t SECTOR_SIZE1 : 1;
/* Byte 5 */
uint8_t SECTOR_SIZE2 : 6;
uint8_t ERASE_BLK_EN : 1;
uint8_t RESERVED4 : 1;
/* Byte 6 */
uint8_t C_SIZE1 : 8;
/* Byte 7 */
uint8_t C_SIZE2 : 8;
/* Byte 8 */
uint8_t C_SIZE3 : 6;
uint8_t RESERVED5 : 2;
/* Byte 9 */
uint8_t RESERVED6 : 4;
uint8_t DSR_IMP : 1;
uint8_t READ_BLK_MISALIGH : 1;
uint8_t WRITE_BLK_MISALIGN : 1;
uint8_t READ_BL_PARTIAL : 1;
/* Byte 10 */
uint8_t READ_BL_LEN : 4;
uint8_t CCC1 : 4;
/* Byte 11 */
uint8_t CCC2 : 8;
/* Byte 12 */
uint8_t TRAN_SPEED : 8;
/* Byte 13 */
uint8_t NSAC : 8;
/* Byte 14 */
uint8_t TAAC : 8;
/* Byte 15 */
uint8_t RESERVED7 : 6;
uint8_t CSD_STRUCTURE : 2;
} stc_sdcard_csd_v2_t;
/**
*******************************************************************************
** \brief SD Card initilization parameters
**
******************************************************************************/
typedef struct stc_sdcard_init
{
en_sdioc_bus_width_t enBusWidth; ///< Specifies the SDIOC bus width.
///< This parameter can be a value of @ref en_sdioc_bus_width_t
en_sdioc_clk_freq_t enClkFreq; ///< Specifies the SDIOC clock frequency.
///< This parameter can be a value of @ref en_sdioc_clk_freq_t
en_sdioc_speed_mode_t enSpeedMode; ///< Specifies the SDIOC speed mode.
///< This parameter can be a value of @ref en_sdioc_speed_mode_t
const stc_sdioc_init_t *pstcInitCfg; ///< SD required parameters
///< and this structure detail refer @ref stc_sdioc_init_t
} stc_sdcard_init_t;
/**
*******************************************************************************
** \brief SD Card use DMA unit/channel parameters
**
******************************************************************************/
typedef struct stc_sdcard_dma_init
{
M4_DMA_TypeDef *DMAx; ///< Pointer to DMA registers base address
///< and this structure detail refer @ref M4_DMA_TypeDef
en_dma_channel_t enDmaCh; ///< Specifies the DMA channel.
///< This parameter can be a value of @ref en_dma_channel_t
} stc_sdcard_dma_init_t;
/**
*******************************************************************************
** \brief SD handle Structure definition
**
******************************************************************************/
typedef struct stc_sd_handle
{
M4_SDIOC_TypeDef *SDIOCx; ///< Pointer to SD registers base address
///< and this structure detail refer @ref M4_SDIOC_TypeDef
en_sd_card_device_mode_t enDevMode; ///< SD Card Write/Read mode and this parameter can be a value of @ref en_sd_card_device_mode_t
const stc_sdcard_dma_init_t *pstcDmaInitCfg; ///< Pointer to SD Card initialization parameters
///< and this structure detail refer @ref stc_sdcard_init_t
const stc_sdcard_init_t *pstcCardInitCfg; ///< Pointer to SD Card initialization parameters
///< and this structure detail refer @ref stc_sdcard_init_t
__IO uint32_t Context; ///< SD transfer context
__IO uint32_t u32ErrorCode; ///< SD Card Error codes
stc_sd_card_info_t stcSdCardInfo; ///< SD Card information
///< and this structure detail refer @ref stc_sd_card_info_t
stc_sdmmc_resp_card_status_t stcCardStatus; ///< SD Card status
///< and this structure detail refer @ref stc_sdmmc_resp_card_status_t
uint32_t OCR; ///< SD Card Operation Condition Register
uint32_t CID[4]; ///< SD Card IDentification
uint32_t CSD[4]; ///< SD Card Specific Data
uint32_t DSR; ///< DSR value
uint32_t RCA; ///< RCA value
uint32_t SCR[2]; ///< SD Card Configuration Register
uint32_t CSR; ///< SD Card Status Register
}stc_sd_handle_t;
/*******************************************************************************
* Global pre-processor symbols/macros ('#define')
******************************************************************************/
#define SD_CARD_ERROR_NONE (SDMMC_ERROR_NONE) /*!< No error */
#define SD_CARD_ERROR_CMD_CRC_FAIL (SDMMC_ERROR_CMD_CRC_FAIL) /*!< Command response received (but CRC check failed) */
#define SD_CARD_ERROR_DATA_CRC_FAIL (SDMMC_ERROR_DATA_CRC_FAIL) /*!< Data block sent/received (CRC check failed) */
#define SD_CARD_ERROR_CMD_RSP_TIMEOUT (SDMMC_ERROR_CMD_RSP_TIMEOUT) /*!< Command response timeout */
#define SD_CARD_ERROR_DATA_TIMEOUT (SDMMC_ERROR_DATA_TIMEOUT) /*!< Data timeout */
#define SD_CARD_ERROR_TX_UNDERRUN (SDMMC_ERROR_TX_UNDERRUN) /*!< Transmit FIFO underrun */
#define SD_CARD_ERROR_RX_OVERRUN (SDMMC_ERROR_RX_OVERRUN) /*!< Receive FIFO overrun */
#define SD_CARD_ERROR_ADDR_MISALIGNED (SDMMC_ERROR_ADDR_MISALIGNED) /*!< Misaligned address */
#define SD_CARD_ERROR_BLOCK_LEN_ERR (SDMMC_ERROR_BLOCK_LEN_ERR) /*!< Transferred block length is not allowed for the card or the
number of transferred bytes does not match the block length */
#define SD_CARD_ERROR_ERASE_SEQ_ERR (SDMMC_ERROR_ERASE_SEQ_ERR) /*!< An error in the sequence of erase command occurs */
#define SD_CARD_ERROR_BAD_ERASE_PARAM (SDMMC_ERROR_BAD_ERASE_PARAM) /*!< An invalid selection for erase groups */
#define SD_CARD_ERROR_WRITE_PROT_VIOLATION (SDMMC_ERROR_WRITE_PROT_VIOLATION) /*!< Attempt to program a write protect block */
#define SD_CARD_ERROR_LOCK_UNLOCK_FAILED (SDMMC_ERROR_LOCK_UNLOCK_FAILED) /*!< Sequence or password error has been detected in unlock
command or if there was an attempt to access a locked card */
#define SD_CARD_ERROR_COM_CRC_FAILED (SDMMC_ERROR_COM_CRC_FAILED) /*!< CRC check of the previous command failed */
#define SD_CARD_ERROR_ILLEGAL_CMD (SDMMC_ERROR_ILLEGAL_CMD) /*!< Command is not legal for the card state */
#define SD_CARD_ERROR_CARD_ECC_FAILED (SDMMC_ERROR_CARD_ECC_FAILED) /*!< Card internal ECC was applied but failed to correct the data */
#define SD_CARD_ERROR_CC_ERR (SDMMC_ERROR_CC_ERR) /*!< Internal card controller error */
#define SD_CARD_ERROR_GENERAL_UNKNOWN_ERR (SDMMC_ERROR_GENERAL_UNKNOWN_ERR) /*!< General or unknown error */
#define SD_CARD_ERROR_STREAM_READ_UNDERRUN (SDMMC_ERROR_STREAM_READ_UNDERRUN) /*!< The card could not sustain data reading in stream rmode */
#define SD_CARD_ERROR_STREAM_WRITE_OVERRUN (SDMMC_ERROR_STREAM_WRITE_OVERRUN) /*!< The card could not sustain data programming in stream mode */
#define SD_CARD_ERROR_CID_CSD_OVERWRITE (SDMMC_ERROR_CID_CSD_OVERWRITE) /*!< CID/CSD overwrite error */
#define SD_CARD_ERROR_WP_ERASE_SKIP (SDMMC_ERROR_WP_ERASE_SKIP) /*!< Only partial address space was erased */
#define SD_CARD_ERROR_CARD_ECC_DISABLED (SDMMC_ERROR_CARD_ECC_DISABLED) /*!< Command has been executed without using internal ECC */
#define SD_CARD_ERROR_ERASE_RESET (SDMMC_ERROR_ERASE_RESET) /*!< Erase sequence was cleared before executing because an out
of erase sequence command was received */
#define SD_CARD_ERROR_AKE_SEQ_ERR (SDMMC_ERROR_AKE_SEQ_ERR) /*!< Error in sequence of authentication */
#define SD_CARD_ERROR_INVALID_VOLTRANGE (SDMMC_ERROR_INVALID_VOLTRANGE) /*!< Error in case of invalid voltage range */
#define SD_CARD_ERROR_ADDR_OUT_OF_RANGE (SDMMC_ERROR_ADDR_OUT_OF_RANGE) /*!< Error when addressed block is out of range */
#define SD_CARD_ERROR_REQUEST_NOT_APPLICABLE (SDMMC_ERROR_REQUEST_NOT_APPLICABLE)/*!< Error when command request is not applicable */
#define SD_CARD_ERROR_PARAM (SDMMC_ERROR_INVALID_PARAMETER) /*!< the used parameter is not valid */
#define SD_CARD_ERROR_UNSUPPORTED_FEATURE (SDMMC_ERROR_UNSUPPORTED_FEATURE) /*!< Error when feature is not insupported */
#define SD_CARD_ERROR_BUSY (SDMMC_ERROR_BUSY) /*!< Error when transfer process is busy */
#define SD_CARD_ERROR_DMA (SDMMC_ERROR_DMA) /*!< Error while DMA transfer */
#define SD_CARD_ERROR_TIMEOUT (SDMMC_ERROR_TIMEOUT) /*!< Timeout error */
/*******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/*******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
en_result_t SDCARD_Init(stc_sd_handle_t *handle,
const stc_sdcard_init_t *pstcInitCfg);
en_result_t SDCARD_SetDeviceMode(stc_sd_handle_t *handle,
en_sd_card_device_mode_t enDevMode);
en_sd_card_device_mode_t SDCARD_GetDeviceMode(const stc_sd_handle_t *handle);
en_result_t SDCARD_GetCardCSD(stc_sd_handle_t *handle);
en_result_t SDCARD_Erase(stc_sd_handle_t *handle,
uint32_t u32BlkStartAddr,
uint32_t u32BlkEndAddr,
uint32_t u32Timeout);
en_result_t SDCARD_ReadBlocks( stc_sd_handle_t *handle,
uint32_t u32BlockAddr,
uint16_t u16BlockCnt,
uint8_t *pu8Data,
uint32_t u32Timeout);
en_result_t SDCARD_WriteBlocks( stc_sd_handle_t *handle,
uint32_t u32BlockAddr,
uint16_t u16BlockCnt,
uint8_t *pu8Data,
uint32_t u32Timeout);
//@} // SdiocGroup
#ifdef __cplusplus
}
#endif
#endif /* __SD_CARD_H__ */
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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/*******************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co., Ltd. All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co., Ltd. ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACCOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file sdmmc_cmd.h
**
** A detailed description is available at
** @link SdiocGroup SDIOC description @endlink
**
** - 2018-11-15 1.0 Hongjh First version for Device Driver Library of SDIOC.
**
******************************************************************************/
#ifndef __SDMMC_CMD_H__
#define __SDMMC_CMD_H__
/*******************************************************************************
* Include files
******************************************************************************/
#include "hc32_ddl.h"
#include "hc32f46x_utility.h"
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
*******************************************************************************
** \defgroup SdiocGroup Secure Digital Input and Output Controller(SDIOC)
**
******************************************************************************/
//@{
/*******************************************************************************
* Global type definitions ('typedef')
******************************************************************************/
/**
*******************************************************************************
** \brief SD/eMMC/SDIO card status
**
******************************************************************************/
typedef enum en_sdmmc_card_state
{
SdmmcCardStateIdle = 0u, ///< Card state: Idle State
SdmmcCardStateReady = 1u, ///< Card state: Ready State
SdmmcCardStateIdent = 2u, ///< Card state: Identification State
SdmmcCardStateStby = 3u, ///< Card state: Stand-by State
SdmmcCardStateTran = 4u, ///< Card state: Transfer State
SdmmcCardStateSendData = 5u, ///< Card state: Sending-data State
SdmmcCardStateRcvData = 6u, ///< Card state: Receive-data State
SdmmcCardStatePgm = 7u, ///< Card state: Programming State
SdmmcCardStateDis = 8u, ///< Card state: Disconnect State
} en_sdmmc_card_state_t;
/**
*******************************************************************************
** \brief SD/eMMC/SDIO card capacity.
**
******************************************************************************/
typedef enum sdmmc_capacity
{
SdmmcStanderdCapacity = 0x00000000u, ///< Card capacity: Standard Capacity
SdmmcHighCapacity = 0x40000000u, ///< Card capacity: High Capacity
} sdmmc_capacity_t;
/**
*******************************************************************************
** \brief SD/eMMC/SDIO card response data structure.
**
******************************************************************************/
typedef struct stc_sdmmc_resp_card_status
{
uint32_t RESERVE1 :3; ///< RESERVE
uint32_t AKE_SEQ_ERROR :1; ///< Error in the sequence of the authentication process
uint32_t RESERVE2 :1; ///< RESERVE
uint32_t APP_CMD :1; ///< The card will expect ACMD, or an indication that the command has been interpreted as ACMD
uint32_t RESERVE3 :2; ///< RESERVE
uint32_t READY_FOR_DATA :1; ///< Corresponds to buffer empty signaling on the bus
uint32_t CURRENT_STATE :4; ///< The state of the card when receiving the command.
uint32_t ERASE_RESET :1; ///< An erase sequence was cleared before executing because an out of erase sequence command was received
uint32_t CARD_ECC_DISABLE :1; ///< The command has been executed without using the internal ECC.
uint32_t WP_ERASE_SKIP :1; ///< Set when only partial address space was erased due to existing write protected blocks or the temporary or permanent write protected card was erased.
uint32_t CSD_OVERWRITE :1; ///< - The read only section of the CSD does not match the card content.
///< - An attempt to reverse the copy (set as original) or permanent WP (unprotected) bits was made.
uint32_t RESERVE4 :2; ///< RESERVE
uint32_t ERRORR :1; ///< A general or an unknown error occurred during the operation.
uint32_t CC_ERROR :1; ///< Internal card controller error
uint32_t CARD_ECC_FAIL :1; ///< Card internal ECC was applied but failed to correct the data.
uint32_t ILLEGAL_CMD :1; ///< Command not legal for the card state
uint32_t COM_CRC_ERROR :1; ///< The CRC check of the previous command failed.
uint32_t LOCK_UNLOCK_FAIL :1; ///< Set when a sequence or password error has been detected in lock/unlock card command.
uint32_t CARD_IS_LOCKED :1; ///< When set, signals that the card is locked by the host
uint32_t WP_VIOLATION :1; ///< Set when the host attempts to write to a protected block or to the temporary or permanent write protected card.
uint32_t ERASE_PARAM :1; ///< An invalid selection of write-blocks for erase occurred.
uint32_t ERASE_SEQ_ERR :1; ///< An error in the sequence of erase commands occurred.
uint32_t BLOCK_LEN_ERR :1; ///< The transferred block length is not allowed for this card, or the number of transferred bytes does not match the block length.
uint32_t ADDRESS_ERROR :1; ///< A misaligned address which did not match the block length was used in the command.
uint32_t OUT_OF_RANGE :1; ///< The command¡¯s argument was out of the allowed range for this card.
} stc_sdmmc_resp_card_status_t;
/*******************************************************************************
* Global pre-processor symbols/macros ('#define')
******************************************************************************/
/**
*******************************************************************************
** \brief SDMMC Commands Index
**
******************************************************************************/
#define CMD0_GO_IDLE_STATE (0u) /*!< Resets the SD memory card. */
#define CMD1_SEND_OP_COND (1u) /*!< Sends host capacity support information and activates the card's initialization process. */
#define CMD2_ALL_SEND_CID (2u) /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */
#define CMD3_SEND_RELATIVE_ADDR (3u) /*!< Asks the card to publish a new relative address (RCA). */
#define CMD_SET_DSR (4u) /*!< Programs the DSR of all cards. */
#define CMD_SDMMC_SEN_OP_COND (5u) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its
operating condition register (OCR) content in the response on the CMD line. */
#define CMD6_SWITCH_FUNC (6u) /*!< Checks switchable function (mode 0) and switch card function (mode 1). */
#define CMD7_SEL_DESEL_CARD (7u) /*!< Selects the card by its own relative address and gets deselected by any other address */
#define CMD8_SEND_IF_COND (8u) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information
and asks the card whether card supports voltage. */
#define CMD9_SEND_CSD (9u) /*!< Addressed card sends its card specific data (CSD) on the CMD line. */
#define CMD10_SEND_CID (10u) /*!< Addressed card sends its card identification (CID) on the CMD line. */
#define CMD11_READ_DAT_UNTIL_STOP (11u) /*!< SD card doesn't support it. */
#define CMD12_STOP_TRANSMISSION (12u) /*!< Forces the card to stop transmission. */
#define CMD13_SEND_STATUS (13u) /*!< Addressed card sends its status register. */
#define CMD14_HS_BUSTEST_READ (14u) /*!< Reserved */
#define CMD15_GO_INACTIVE_STATE (15u) /*!< Sends an addressed card into the inactive state. */
#define CMD16_SET_BLOCKLEN (16u) /*!< Sets the block length (in bytes for SDSC) for all following block commands
(read, write, lock). Default block length is fixed to 512 Bytes. Not effective
for SDHS and SDXC. */
#define CMD17_READ_SINGLE_BLOCK (17u) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
fixed 512 bytes in case of SDHC and SDXC. */
#define CMD18_READ_MULTIPLE_BLOCK (18u) /*!< Continuously transfers data blocks from card to host until interrupted by
STOP_TRANSMISSION command. */
#define CMD19_HS_BUSTEST_WRITE (19u) /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */
#define CMD20_WRITE_DAT_UNTIL_STOP (20u) /*!< Speed class control command. */
#define CMD23_SET_BLOCK_COUNT (23u) /*!< Specify block count for CMD18 and CMD25. */
#define CMD24_WRITE_SINGLE_BLOCK (24u) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
fixed 512 bytes in case of SDHC and SDXC. */
#define CMD25_WRITE_MULTIPLE_BLOCK (25u) /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */
#define CMD26_PROG_CID (26u) /*!< Reserved for manufacturers. */
#define CMD27_PROG_CSD (27u) /*!< Programming of the programmable bits of the CSD. */
#define CMD28_SET_WRITE_PROT (28u) /*!< Sets the write protection bit of the addressed group. */
#define CMD29_CLR_WRITE_PROT (29u) /*!< Clears the write protection bit of the addressed group. */
#define CMD30_SEND_WRITE_PROT (30u) /*!< Asks the card to send the status of the write protection bits. */
#define CMD32_ERASE_WR_BLK_START (32u) /*!< Sets the address of the first write block to be erased. (For SD card only). */
#define CMD33_ERASE_WR_BLK_END (33u) /*!< Sets the address of the last write block of the continuous range to be erased. */
#define CMD35_ERASE_GRP_START (35u) /*!< Sets the address of the first write block to be erased. Reserved for each command
system set by switch function command (CMD6). */
#define CMD36_ERASE_GRP_END (36u) /*!< Sets the address of the last write block of the continuous range to be erased.
Reserved for each command system set by switch function command (CMD6). */
#define CMD38_ERASE (38u) /*!< Reserved for SD security applications. */
#define CMD39_FAST_IO (39u) /*!< SD card doesn't support it (Reserved). */
#define CMD40_GO_IRQ_STATE (40u) /*!< SD card doesn't support it (Reserved). */
#define CMD42_LOCK_UNLOCK (42u) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by
the SET_BLOCK_LEN command. */
#define CMD55_APP_CMD (55u) /*!< Indicates to the card that the next command is an application specific command rather
than a standard command. */
#define CMD56_GEN_CMD (56u) /*!< Used either to transfer a data block to the card or to get a data block from the card
for general purpose/application specific commands. */
#define CMD64_NO_CMD (64u) /*!< No command */
/**
*******************************************************************************
** \brief SDMMC_APP_CMD Commands Index
**
******************************************************************************/
#define ACMD6_APP_SD_SET_BUSWIDTH (6u) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus
widths are given in SCR register. */
#define ACMD13_SD_APP_STATUS (13u) /*!< (ACMD13) Sends the SD status. */
#define ACMD22_SD_APP_SEND_NUM_WRITE_BLOCKS (22u) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with
32bit+CRC data block. */
#define ACMD41_SD_SEND_OP_COND (41u) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to
send its operating condition register (OCR) content in the response on the CMD line. */
#define ACMD42_SET_CLR_CARD_DETECT (42u) /*!< (ACMD42) Connect/Disconnect the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card */
#define ACMD51_SD_APP_SEND_SCR (51u) /*!< Reads the SD Configuration Register (SCR). */
#define ACMD52_RW_DIRECT (52u) /*!< For SD I/O card only, reserved for security specification. */
#define ACMD53_RW_EXTENDED (53u) /*!< For SD I/O card only, reserved for security specification. */
/**
*******************************************************************************
** \brief SD Card Specific security commands Commands Index
**
******************************************************************************/
#define ACMD43_GET_MKB (43u)
#define ACMD44_GET_MID (44u)
#define ACMD45_SET_CER_RN1 (45u)
#define ACMD46_GET_CER_RN2 (46u)
#define ACMD47_SET_CER_RES2 (47u)
#define ACMD48_GET_CER_RES1 (48u)
#define ACMD18_SECURE_READ_MULTIPLE_BLOCK (18u)
#define ACMD25_SECURE_WRITE_MULTIPLE_BLOCK (25u)
#define ACMD38_SECURE_ERASE (38u)
#define ACMD49_CHANGE_SECURE_AREA (49u)
#define ACMD48_SECURE_WRITE_MKB (48u)
/**
*******************************************************************************
** \brief Media voltage supported.
**
******************************************************************************/
#define SDMMC_SD_VOLT_1_7 (0x00000010ul) /* Low voltage card minimum */
#define SDMMC_SD_VOLT_1_8 (0x00000020ul)
#define SDMMC_SD_VOLT_1_9 (0x00000040ul)
#define SDMMC_SD_VOLT_2_0 (0x00000080ul)
#define SDMMC_SD_VOLT_2_1 (0x00000100ul) /* Basic communication minimum */
#define SDMMC_SD_VOLT_2_2 (0x00000200ul)
#define SDMMC_SD_VOLT_2_3 (0x00000400ul)
#define SDMMC_SD_VOLT_2_4 (0x00000800ul)
#define SDMMC_SD_VOLT_2_5 (0x00001000ul)
#define SDMMC_SD_VOLT_2_6 (0x00002000ul)
#define SDMMC_SD_VOLT_2_7 (0x00004000ul)
#define SDMMC_SD_VOLT_2_8 (0x00008000ul) /* Memory access minimum */
#define SDMMC_SD_VOLT_2_9 (0x00010000ul)
#define SDMMC_SD_VOLT_3_0 (0x00020000ul)
#define SDMMC_SD_VOLT_3_1 (0x00040000ul)
#define SDMMC_SD_VOLT_3_2 (0x00080000ul)
#define SDMMC_SD_VOLT_3_3 (0x00100000ul)
#define SDMMC_SD_VOLT_3_4 (0x00200000ul)
#define SDMMC_SD_VOLT_3_5 (0x00400000ul)
#define SDMMC_SD_VOLT_3_6 (0x00800000ul)
#define SDMMC_ERROR_NONE (0x00000000ul) /*!< No error */
#define SDMMC_ERROR_CMD_CRC_FAIL (0x00000001ul) /*!< Command response received (but CRC check failed) */
#define SDMMC_ERROR_DATA_CRC_FAIL (0x00000002ul) /*!< Data block sent/received (CRC check failed) */
#define SDMMC_ERROR_CMD_RSP_TIMEOUT (0x00000004ul) /*!< Command response timeout */
#define SDMMC_ERROR_DATA_TIMEOUT (0x00000008ul) /*!< Data timeout */
#define SDMMC_ERROR_TX_UNDERRUN (0x00000010ul) /*!< Transmit FIFO underrun */
#define SDMMC_ERROR_RX_OVERRUN (0x00000020ul) /*!< Receive FIFO overrun */
#define SDMMC_ERROR_ADDR_MISALIGNED (0x00000040ul) /*!< Misaligned address */
#define SDMMC_ERROR_BLOCK_LEN_ERR (0x00000080ul) /*!< Transferred block length is not allowed for the card or the
number of transferred bytes does not match the block length */
#define SDMMC_ERROR_ERASE_SEQ_ERR (0x00000100ul) /*!< An error in the sequence of erase command occurs */
#define SDMMC_ERROR_BAD_ERASE_PARAM (0x00000200ul) /*!< An invalid selection for erase groups */
#define SDMMC_ERROR_WRITE_PROT_VIOLATION (0x00000400ul) /*!< Attempt to program a write protect block */
#define SDMMC_ERROR_LOCK_UNLOCK_FAILED (0x00000800ul) /*!< Sequence or password error has been detected in unlock
command or if there was an attempt to access a locked card */
#define SDMMC_ERROR_COM_CRC_FAILED (0x00001000ul) /*!< CRC check of the previous command failed */
#define SDMMC_ERROR_ILLEGAL_CMD (0x00002000ul) /*!< Command is not legal for the card state */
#define SDMMC_ERROR_CARD_ECC_FAILED (0x00004000ul) /*!< Card internal ECC was applied but failed to correct the data */
#define SDMMC_ERROR_CC_ERR (0x00008000ul) /*!< Internal card controller error */
#define SDMMC_ERROR_GENERAL_UNKNOWN_ERR (0x00010000ul) /*!< General or unknown error */
#define SDMMC_ERROR_STREAM_READ_UNDERRUN (0x00020000ul) /*!< The card could not sustain data reading in stream rmode */
#define SDMMC_ERROR_STREAM_WRITE_OVERRUN (0x00040000ul) /*!< The card could not sustain data programming in stream mode */
#define SDMMC_ERROR_CID_CSD_OVERWRITE (0x00080000ul) /*!< CID/CSD overwrite error */
#define SDMMC_ERROR_WP_ERASE_SKIP (0x00100000ul) /*!< Only partial address space was erased */
#define SDMMC_ERROR_CARD_ECC_DISABLED (0x00200000ul) /*!< Command has been executed without using internal ECC */
#define SDMMC_ERROR_ERASE_RESET (0x00400000ul) /*!< Erase sequence was cleared before executing because an out
of erase sequence command was received */
#define SDMMC_ERROR_AKE_SEQ_ERR (0x00800000ul) /*!< Error in sequence of authentication */
#define SDMMC_ERROR_INVALID_VOLTRANGE (0x01000000ul) /*!< Error in case of invalid voltage range */
#define SDMMC_ERROR_ADDR_OUT_OF_RANGE (0x02000000ul) /*!< Error when addressed block is out of range */
#define SDMMC_ERROR_REQUEST_NOT_APPLICABLE (0x04000000ul) /*!< Error when command request is not applicable */
#define SDMMC_ERROR_INVALID_PARAMETER (0x08000000ul) /*!< the used parameter is not valid */
#define SDMMC_ERROR_UNSUPPORTED_FEATURE (0x10000000ul) /*!< Error when feature is not insupported */
#define SDMMC_ERROR_BUSY (0x20000000ul) /*!< Error when transfer process is busy */
#define SDMMC_ERROR_DMA (0x40000000ul) /*!< Error while DMA transfer */
#define SDMMC_ERROR_TIMEOUT (0x80000000ul) /*!< Timeout error */
/*******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/*******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
en_result_t SDMMC_Cmd0_GoIdleState(M4_SDIOC_TypeDef *SDIOCx);
en_result_t SDMMC_Cmd1_SendOpCond(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32Argument, uint32_t *pu32OCR);
en_result_t SDMMC_Cmd2_AllSendCID(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32CID[4]);
en_result_t SDMMC_Cmd3_SendRelativeAddr(M4_SDIOC_TypeDef *SDIOCx, uint32_t *pu32RCA);
en_result_t SDMMC_Cmd6_SwitchFunc(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32Argument, uint32_t *pu32Resp1);
en_result_t SDMMC_Cmd7_SelectDeselectCard(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32RCA, uint32_t *pu32Resp1);
en_result_t SDMMC_Cmd8_SendIfCond(M4_SDIOC_TypeDef *SDIOCx, uint32_t *pu32IfCond);
en_result_t SDMMC_Cmd9_SendCSD(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32RCA, uint32_t u32CSD[4]);
en_result_t SDMMC_Cmd10_SendCID(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32RCA, uint32_t u32CID[4]);
en_result_t SDMMC_Cmd12_StopTransmission(M4_SDIOC_TypeDef *SDIOCx, uint32_t *pu32Resp1);
en_result_t SDMMC_Cmd13_SendStatus(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32RCA, uint32_t *pu32Resp1);
en_result_t SDMMC_Cmd16_SetBlockLength(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32BlockLen, uint32_t *pu32Resp1);
en_result_t SDMMC_Cmd17_ReadSingleBlock(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32ReadAddr, uint32_t *pu32Resp1);
en_result_t SDMMC_Cmd18_ReadMultipleBlock(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32ReadAddr, uint32_t *pu32Resp1);
en_result_t SDMMC_Cmd24_WriteSingleBlock(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32WriteAddr, uint32_t *pu32Resp1);
en_result_t SDMMC_Cmd25_WriteMultipleBlock(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32WriteAddr, uint32_t *pu32Resp1);
en_result_t SDMMC_Cmd32_EraseWrBlkStart(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32StartAddr, uint32_t *pu32Resp1);
en_result_t SDMMC_Cmd33_EraseWrBlkEnd(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32EndAddr, uint32_t *pu32Resp1);
en_result_t SDMMC_Cmd35_SetEraseStartAddr(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32StartAddr, uint32_t *pu32Resp1);
en_result_t SDMMC_Cmd36_SetEraseEndAddr(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32EndAddr, uint32_t *pu32Resp1);
en_result_t SDMMC_Cmd38_Erase(M4_SDIOC_TypeDef *SDIOCx, uint32_t *pu32Resp1);
en_result_t SDMMC_Cmd55_AppCmd(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32Argument, uint32_t *pu32Resp1);
en_result_t SDMMC_Acmd6_SetBusWidth(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32BusWidth, uint32_t *pu32Resp1);
en_result_t SDMMC_Acmd13_SdStatus(M4_SDIOC_TypeDef *SDIOCx, uint32_t *pu32Resp1);
en_result_t SDMMC_Acmd41_SdSendOpCond(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32SdType, uint32_t *pu32OCR);
en_result_t SDMMC_Acmd51_SendSCR(M4_SDIOC_TypeDef *SDIOCx, uint32_t *pu32Resp1);
//@} // SdiocGroup
#ifdef __cplusplus
}
#endif
#endif /* __SDMMC_CMD_H__ */
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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/*****************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACCOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file w25qxx.h
**
** A detailed description is available at
** @link W25QXXGroup W25Q64 description @endlink
**
** - 2019-05-15 1.0 Zhangxl First version for Device Driver Library.
**
******************************************************************************/
#ifndef __W25QXX_H__
#define __W25QXX_H__
/*******************************************************************************
* Include files
******************************************************************************/
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
*******************************************************************************
** \defgroup W25QXXGroup W25Q64 SPI NOR Flash driver
**
******************************************************************************/
//@{
/*******************************************************************************
* Global type definitions ('typedef')
******************************************************************************/
/*****************************************************************************/
/* Global pre-processor symbols/macros ('define') */
/*****************************************************************************/
/* W25QXX Flash ID */
#define W25Q80 0XEF13u
#define W25Q16 0XEF14u
#define W25Q32 0XEF15u
#define W25Q64 0XEF16u
#define W25Q128 0XEF17u
/* W25QXX Command list */
#define W25X_WriteEnable 0x06u
#define W25X_WriteDisable 0x04u
#define W25X_ReadStatusReg 0x05u
#define W25X_WriteStatusReg 0x01u
#define W25X_ReadData 0x03u
#define W25X_FastReadData 0x0Bu
#define W25X_FastReadDual 0x3Bu
#define W25X_PageProgram 0x02u
#define W25X_BlockErase 0xD8u
#define W25X_SectorErase 0x20u
#define W25X_ChipErase 0xC7u
#define W25X_PowerDown 0xB9u
#define W25X_ReleasePowerDown 0xABu
#define W25X_DeviceID 0xABu
#define W25X_ManufactDeviceID 0x90u
#define W25X_JedecDeviceID 0x9Fu
/*******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
extern uint16_t W25QXX_TYPE;
/*******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
void W25QXX_Init(void);
uint16_t W25QXX_ReadID(void);
uint8_t W25QXX_ReadSR(void);
void W25QXX_Write_SR(uint8_t sr);
void W25QXX_Write_Enable(void);
void W25QXX_Write_Disable(void);
void W25QXX_Write_NoCheck(uint8_t* pBuffer, uint32_t WriteAddr, uint16_t NumByteToWrite);
void W25QXX_Read(uint8_t* pBuffer, uint32_t ReadAddr, uint16_t NumByteToRead);
void W25QXX_Write(uint8_t* pBuffer, uint32_t WriteAddr, uint16_t NumByteToWrite);
void W25QXX_Erase_Chip(void);
void W25QXX_Erase_Sector(uint32_t Dst_Addr);
void W25QXX_Wait_Busy(void);
void W25QXX_PowerDown(void);
void W25QXX_WAKEUP(void);
//@} // W25QXXGroup
#ifdef __cplusplus
}
#endif
#endif /* __W25QXX_H__ */
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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/*******************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co., Ltd. All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co., Ltd. ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACCOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file w25qxx.c
**
** A detailed description is available at
** @link W25QXXGroup W25Q64 description @endlink
**
** - 2019-05-15 1.0 Zhangxl First version for Device Driver Library of W25QXX.
**
******************************************************************************/
/*******************************************************************************
* Include files
******************************************************************************/
#include "hc32_ddl.h"
#include "w25qxx.h"
/*******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/*******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
/* QSPCK Port/Pin definition */
#define QSPCK_PORT (PortC)
#define QSPCK_PIN (Pin06)
/* QSNSS Port/Pin definition */
#define QSNSS_PORT (PortC)
#define QSNSS_PIN (Pin07)
/* QSIO0 Port/Pin definition */
#define QSIO0_PORT (PortD)
#define QSIO0_PIN (Pin08)
/* QSIO1 Port/Pin definition */
#define QSIO1_PORT (PortD)
#define QSIO1_PIN (Pin09)
/*******************************************************************************
* Global variable definitions (declared in header file with 'extern')
******************************************************************************/
uint16_t W25QXX_TYPE = W25Q64;
uint8_t W25QXX_BUFFER[4096];
/*******************************************************************************
* Local function prototypes ('static')
******************************************************************************/
/*******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
/**
*******************************************************************************
** \brief W25QXX IO initialize
**
** \param None
**
** \retval None
**
******************************************************************************/
void W25QXX_Init(void)
{
stc_qspi_init_t stcQspiInit;
/* configuration structure initialization */
MEM_ZERO_STRUCT(stcQspiInit);
/* Configuration peripheral clock */
PWC_Fcg1PeriphClockCmd(PWC_FCG1_PERIPH_QSPI, Enable);
/* Configuration QSPI pin */
PORT_SetFunc(QSPCK_PORT, QSPCK_PIN, Func_Qspi, Disable);
PORT_SetFunc(QSNSS_PORT, QSNSS_PIN, Func_Qspi, Disable);
PORT_SetFunc(QSIO0_PORT, QSIO0_PIN, Func_Qspi, Disable);
PORT_SetFunc(QSIO1_PORT, QSIO1_PIN, Func_Qspi, Disable);
/* Configuration QSPI structure */
stcQspiInit.enClkDiv = QspiHclkDiv2;
stcQspiInit.enSpiMode = QspiSpiMode0;
stcQspiInit.enBusCommMode = QspiBusModeRomAccess;
stcQspiInit.enPrefetchMode = QspiPrefetchStopComplete;
stcQspiInit.enPrefetchFuncEn = Disable;
stcQspiInit.enQssnValidExtendTime = QspiQssnValidExtendNot;
stcQspiInit.enQssnIntervalTime = QspiQssnIntervalQsck8;
stcQspiInit.enQsckDutyCorr = QspiQsckDutyCorrNot;
stcQspiInit.enVirtualPeriod = QspiVirtualPeriodQsck8;
stcQspiInit.enWpPinLevel = QspiWpPinOutputLow;
stcQspiInit.enQssnSetupDelayTime = QspiQssnSetupDelayHalfQsck;
stcQspiInit.enQssnHoldDelayTime = QspiQssnHoldDelayHalfQsck;
stcQspiInit.enFourByteAddrReadEn = Disable;
stcQspiInit.enAddrWidth = QspiAddressByteThree;
stcQspiInit.stcCommProtocol.enReadMode = QspiReadModeStandard;
stcQspiInit.stcCommProtocol.enTransInstrProtocol = QspiProtocolExtendSpi;
stcQspiInit.stcCommProtocol.enTransAddrProtocol = QspiProtocolExtendSpi;
stcQspiInit.stcCommProtocol.enReceProtocol = QspiProtocolExtendSpi;
stcQspiInit.u8RomAccessInstr = QSPI_3BINSTR_STANDARD_READ;
QSPI_Init(&stcQspiInit);
/* Read Flash ID */
W25QXX_TYPE = W25QXX_ReadID();
}
/**
*******************************************************************************
** \brief W25QXX Read Status Register
**
** \param None
**
** \retval SR value
**
******************************************************************************/
uint8_t W25QXX_ReadSR(void)
{
uint8_t regSta = 0u;
QSPI_EnterDirectCommMode();
QSPI_WriteDirectCommValue(W25X_ReadStatusReg);
regSta = QSPI_ReadDirectCommValue();
QSPI_ExitDirectCommMode();
return regSta;
}
/**
*******************************************************************************
** \brief W25QXX Write Status Register
**
** \param [in] sr
**
** \retval None
**
******************************************************************************/
void W25QXX_Write_SR(uint8_t sr)
{
QSPI_EnterDirectCommMode();
QSPI_WriteDirectCommValue(W25X_WriteStatusReg);
QSPI_WriteDirectCommValue(sr);
QSPI_ExitDirectCommMode();
}
/**
*******************************************************************************
** \brief W25QXX Write enable
**
** \param None
**
** \retval None
**
******************************************************************************/
void W25QXX_Write_Enable(void)
{
QSPI_EnterDirectCommMode();
QSPI_WriteDirectCommValue(W25X_WriteEnable);
QSPI_ExitDirectCommMode();
}
/**
*******************************************************************************
** \brief W25QXX Write disable
**
** \param None
**
** \retval None
**
******************************************************************************/
void W25QXX_Write_Disable(void)
{
QSPI_EnterDirectCommMode();
QSPI_WriteDirectCommValue(W25X_WriteDisable);
QSPI_ExitDirectCommMode();
}
/**
*******************************************************************************
** \brief W25QXX read flash ID
**
** \param None
**
** \retval u16FlashID
** 0XEF13: W25Q80
** 0XEF14: W25Q16
** 0XEF15: W25Q32
** 0XEF16: W25Q64
** 0XEF17: W25Q128
**
******************************************************************************/
uint16_t W25QXX_ReadID(void)
{
uint16_t u16FlashID = 0u;
QSPI_EnterDirectCommMode();
QSPI_WriteDirectCommValue(W25X_ManufactDeviceID);
QSPI_WriteDirectCommValue(0x00u);
QSPI_WriteDirectCommValue(0x00u);
QSPI_WriteDirectCommValue(0x00u);
u16FlashID |= (uint16_t)((uint16_t)QSPI_ReadDirectCommValue() << (int8_t)8);
u16FlashID |= QSPI_ReadDirectCommValue();
QSPI_ExitDirectCommMode();
return u16FlashID;
}
/**
*******************************************************************************
** \brief W25QXX read flash content
**
** \param [in] ReadAddr Address to be read
** \param [in] NumByteToRead Number to be read, (MAX. 65535)
** \param [out] pBuffer Read data buffer
**
** \retval None
**
******************************************************************************/
void W25QXX_Read(uint8_t* pBuffer, uint32_t ReadAddr, uint16_t NumByteToRead)
{
uint16_t i;
QSPI_EnterDirectCommMode();
QSPI_WriteDirectCommValue(W25X_ReadData);
QSPI_WriteDirectCommValue((uint8_t)((ReadAddr) >> 16u));
QSPI_WriteDirectCommValue((uint8_t)((ReadAddr) >> 8u));
QSPI_WriteDirectCommValue((uint8_t)ReadAddr);
for (i = 0u; i < NumByteToRead; i++)
{
pBuffer[i] = QSPI_ReadDirectCommValue();
}
QSPI_ExitDirectCommMode();
}
/**
*******************************************************************************
** \brief W25QXX page write
**
** \param [in] pBuffer data buffer to be written
** \param [in] WriteAddr Address to be written
** \param [in] NumByteToWrite Number to be written, (MAX. 256)
**
** \retval None
**
******************************************************************************/
void W25QXX_Write_Page(uint8_t* pBuffer, uint32_t WriteAddr, uint16_t NumByteToWrite)
{
W25QXX_Write_Enable();
/* Send data to flash */
QSPI_EnterDirectCommMode();
QSPI_WriteDirectCommValue(W25X_PageProgram);
QSPI_WriteDirectCommValue((uint8_t)((WriteAddr & 0xFF0000ul) >> 16u));
QSPI_WriteDirectCommValue((uint8_t)((WriteAddr & 0xFF00u) >> 8u));
QSPI_WriteDirectCommValue((uint8_t)(WriteAddr & 0xFFu));
while (NumByteToWrite--)
{
QSPI_WriteDirectCommValue(*pBuffer++);
}
QSPI_ExitDirectCommMode();
/* Wait for flash idle */
W25QXX_Wait_Busy();
}
/**
*******************************************************************************
** \brief W25QXX flash write
**
** \param [in] pBuffer data buffer to be written
** \param [in] WriteAddr Address to be written
** \param [in] NumByteToWrite Number to be written, (MAX. 65535)
**
** \retval None
**
******************************************************************************/
void W25QXX_Write_NoCheck(uint8_t* pBuffer, uint32_t WriteAddr, uint16_t NumByteToWrite)
{
uint16_t pageremain;
pageremain = (uint16_t)(256u - WriteAddr % 256u);
if (NumByteToWrite <= pageremain)
{
pageremain = NumByteToWrite;
}
while (1)
{
W25QXX_Write_Page(pBuffer, WriteAddr, pageremain);
if (NumByteToWrite == pageremain)
{
break;
}
else //NumByteToWrite>pageremain
{
pBuffer += pageremain;
WriteAddr += pageremain;
NumByteToWrite -= pageremain;
if (NumByteToWrite > 256u)
{
pageremain = 256u;
}
else
{
pageremain = NumByteToWrite;
}
}
}
}
/**
*******************************************************************************
** \brief W25QXX flash write API for MSC
**
** \param [in] pBuffer data buffer to be written
** \param [in] WriteAddr Address to be written
** \param [in] NumByteToWrite Number to be written, (MAX. 65535)
**
** \retval None
**
******************************************************************************/
void W25QXX_Write(uint8_t* pBuffer, uint32_t WriteAddr, uint16_t NumByteToWrite)
{
uint32_t secpos;
uint16_t secoff;
uint16_t secremain;
uint16_t i;
uint8_t * W25QXX_BUF;
W25QXX_BUF = W25QXX_BUFFER;
secpos = WriteAddr / 4096u;
secoff = (uint16_t)(WriteAddr % 4096u);
secremain = 4096u - secoff;
// printf("ad:%X,nb:%X\r\n",WriteAddr,NumByteToWrite); // for test
if (NumByteToWrite <= secremain)
{
secremain = NumByteToWrite; //　less than 4K
}
while (1)
{
W25QXX_Read(W25QXX_BUF, secpos * 4096u, 4096u); // read one sector content
for (i = 0u; i < secremain; i++) // check if blank sector
{
if (W25QXX_BUF[secoff + i] != (uint8_t)0XFF)
{
break;
}
}
if (i < secremain)
{
W25QXX_Erase_Sector(secpos); // not blank, need erase
for (i = 0u; i < secremain; i++) // backup first
{
W25QXX_BUF[i + secoff] = pBuffer[i];
}
W25QXX_Write_NoCheck(W25QXX_BUF, secpos * 4096u, 4096u); // write back after erase
}
else
{
W25QXX_Write_NoCheck(pBuffer, WriteAddr, secremain);
}
if (NumByteToWrite == secremain)
{
break;
}
else
{
secpos++; // next sector
secoff = 0u;
pBuffer += secremain;
WriteAddr += secremain;
NumByteToWrite -= secremain;
if (NumByteToWrite > 4096u)
{
secremain = 4096u;
}
else
{
secremain = NumByteToWrite;
}
}
}
;
}
/**
*******************************************************************************
** \brief W25QXX flash chip erase
**
** \param None
**
** \retval None
**
******************************************************************************/
void W25QXX_Erase_Chip(void)
{
W25QXX_Write_Enable();
W25QXX_Wait_Busy();
QSPI_EnterDirectCommMode();
QSPI_WriteDirectCommValue(W25X_ChipErase);
QSPI_ExitDirectCommMode();
W25QXX_Wait_Busy();
}
/**
*******************************************************************************
** \brief W25QXX flash sector erase
**
** \param [in] Dst_Addr address
**
** \retval None
**
******************************************************************************/
void W25QXX_Erase_Sector(uint32_t Dst_Addr)
{
Dst_Addr *= 4096u;
W25QXX_Write_Enable();
W25QXX_Wait_Busy();
QSPI_EnterDirectCommMode();
QSPI_WriteDirectCommValue(W25X_SectorErase);
QSPI_WriteDirectCommValue((uint8_t)((Dst_Addr) >> 16u));
QSPI_WriteDirectCommValue((uint8_t)((Dst_Addr) >> 8u));
QSPI_WriteDirectCommValue((uint8_t)Dst_Addr);
QSPI_ExitDirectCommMode();
W25QXX_Wait_Busy();
}
/**
*******************************************************************************
** \brief W25QXX flash wait SR.BUSY
**
** \param None
**
** \retval None
**
******************************************************************************/
void W25QXX_Wait_Busy(void)
{
while ((W25QXX_ReadSR() & 0x01u) == 0x01u) // Wait SR.BUSY = 0
{
;
}
}
/**
*******************************************************************************
** \brief W25QXX enter power down mode
**
** \param None
**
** \retval None
**
******************************************************************************/
void W25QXX_PowerDown(void)
{
QSPI_EnterDirectCommMode();
QSPI_WriteDirectCommValue(W25X_PowerDown);
QSPI_ExitDirectCommMode();
Ddl_Delay1ms(1ul);
}
/**
*******************************************************************************
** \brief W25QXX wake up
**
** \param None
**
** \retval None
**
******************************************************************************/
void W25QXX_WAKEUP(void)
{
QSPI_EnterDirectCommMode();
QSPI_WriteDirectCommValue(W25X_ReleasePowerDown);
QSPI_ExitDirectCommMode();
Ddl_Delay1ms(1ul);
}
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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/*******************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co., Ltd. All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co., Ltd. ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACCOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file data_sound_i2s.h
**
** Sound data Module
**
** - 2018-11-13 1.0 Wangmin First version for Device Driver Library
**
******************************************************************************/
#ifndef __DATA_SOUND_I2S_H__
#define __DATA_SOUND_I2S_H__
/*****************************************************************************/
/* Include files */
/*****************************************************************************/
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/*****************************************************************************/
/* Global pre-processor symbols/macros ('define') */
/*****************************************************************************/
/******************************************************************************
* Global definitions
******************************************************************************/
/*****************************************************************************/
/* Global type definitions ('typedef') */
/*****************************************************************************/
/*****************************************************************************/
/* Global variable declarations ('extern', definition in C source) */
/*****************************************************************************/
extern uint32_t u32WavLen_8k;
extern uint32_t u32WavLen_44k;
extern const uint8_t au8PixieDustSoundI2s_441[];
extern const uint8_t au8PixieDustSoundI2s_8[];
/*****************************************************************************/
/* Global function prototypes ('extern', definition in C source) */
/*****************************************************************************/
#ifdef __cplusplus
}
#endif
#endif /* __DATA_SOUND_I2S_H__ */
/*****************************************************************************/
/* EOF (not truncated) */
/*****************************************************************************/

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/*****************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co.,Ltd All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co.,Ltd ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACCOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file wm8731.h
**
** A detailed description is available at
** @link Wm8731Group WM8731 description @endlink
**
** - 2018-10-13 1.0 Wangmin First version for Device Driver Library.
**
******************************************************************************/
#ifndef __WM8731_H__
#define __WM8731_H__
/*******************************************************************************
* Include files
******************************************************************************/
/* C binding of definitions if building with C++ compiler */
#ifdef __cplusplus
extern "C"
{
#endif
/**
*******************************************************************************
** \defgroup Wm8731Group Wm8731 CODECs with an integrated headphone driver
**
******************************************************************************/
//@{
/*******************************************************************************
* Global type definitions ('typedef')
******************************************************************************/
/*****************************************************************************/
/* Global pre-processor symbols/macros ('define') */
/*****************************************************************************/
#define WM8731_ADDRESS (0x1Au) // WM8731 chip address on I2C bus
#define WM8731_REG_LLINE_IN (0x00u) // Left Channel Line Input Volume Control
#define WM8731_REG_RLINE_IN (0x01u) // Right Channel Line Input Volume Control
#define WM8731_REG_LHPHONE_OUT (0x02u) // Left Channel Headphone Output Volume Control
#define WM8731_REG_RHPHONE_OUT (0x03u) // Right Channel Headphone Output Volume Control
#define WM8731_REG_ANALOG_PATH (0x04u) // Analog Audio Path Control
#define WM8731_REG_DIGITAL_PATH (0x05u) // Digital Audio Path Control
#define WM8731_REG_PDOWN_CTRL (0x06u) // Power Down Control Register
#define WM8731_REG_DIGITAL_IF (0x07u) // Digital Audio Interface Format
#define WM8731_REG_SAMPLING_CTRL (0x08u) // Sampling Control Register
#define WM8731_REG_ACTIVE_CTRL (0x09u) // Active Control
#define WM8731_REG_RESET (0x0Fu) // Reset register
/******************************************************************************
* WM8731 registers bit field
******************************************************************************/
typedef struct stc_wm8731_llin_field
{
uint16_t LINVOL : 5;
uint16_t RESERVED : 2;
uint16_t LINMUTE : 1;
uint16_t LRINBOTH : 1;
}stc_wm8731_llin_field_t;
typedef struct stc_wm8731_rlin_field
{
uint16_t RINVOL : 5;
uint16_t RESERVED : 2;
uint16_t RINMUTE : 1;
uint16_t RINBOTH : 1;
}stc_wm8731_rlin_field_t;
typedef struct stc_wm8731_lhout_field
{
uint16_t LHPVOL : 7;
uint16_t LZCEN : 1;
uint16_t LRHPBOTH : 1;
}stc_wm8731_lhout_field_t;
typedef struct stc_wm8731_rhout_field
{
uint16_t RHPVOL : 7;
uint16_t RZCEN : 1;
uint16_t RLHPBOTH : 1;
}stc_wm8731_rhout_field_t;
typedef struct stc_wm8731_aapc_field
{
uint16_t MICBOOST : 1;
uint16_t MUTEMIC : 1;
uint16_t INSEL : 1;
uint16_t BYPASS : 1;
uint16_t DACSEL : 1;
uint16_t SIDETONE : 1;
uint16_t SIDEATT : 2;
}stc_wm8731_aapc_field_t;
typedef struct stc_wm8731_dapc_field
{
uint16_t ADCHPD : 1;
uint16_t DEEMP : 2;
uint16_t DACMU : 1;
uint16_t HPOR : 1;
}stc_wm8731_dapc_field_t;
typedef struct stc_wm8731_pdc_field
{
uint16_t LINEINPD : 1;
uint16_t MICPD : 1;
uint16_t ADCPD : 1;
uint16_t DACPD : 1;
uint16_t OUTPD : 1;
uint16_t OSCPD : 1;
uint16_t CLKOUTPD : 1;
uint16_t POWEROFF : 1;
}stc_wm8731_pdc_field_t;
typedef struct stc_wm8731_daif_field
{
uint16_t FORMAT : 2;
uint16_t IWL : 2;
uint16_t LRP : 1;
uint16_t LRSWAP : 1;
uint16_t MS : 1;
uint16_t BCLKINV : 1;
}stc_wm8731_daif_field_t;
typedef struct stc_wm8731_sc_field
{
uint16_t NORMAL_USB : 1;
uint16_t BOSR : 1;
uint16_t SR : 4;
uint16_t CLKDIV2 : 1;
uint16_t CLKODIV2 : 1;
}stc_wm8731_sc_field_t;
typedef struct stc_wm8731_ac_field
{
uint16_t ACTIVE : 1;
}stc_wm8731_ac_field_t;
/******************************************************************************
* WM8731 registers structure
******************************************************************************/
typedef struct stc_wm8731_reg
{
union {
__IO uint16_t LLIN; ///< Left line in register
stc_wm8731_llin_field_t LLIN_f;
};
union {
__IO uint16_t RLIN; ///< Right line in register
stc_wm8731_rlin_field_t RLIN_f;
};
union {
__IO uint16_t LHOUT; ///< Left headphone out register
stc_wm8731_lhout_field_t LHOUT_f;
};
union {
__IO uint16_t RHOUT; ///< Right headphone out register
stc_wm8731_rhout_field_t RHOUT_f;
};
union {
__IO uint16_t AAPC; ///< Analog audio path control register
stc_wm8731_aapc_field_t AAPC_f;
};
union {
__IO uint16_t DAPC; ///< Digital audio path control register
stc_wm8731_dapc_field_t DAPC_f;
};
union {
__IO uint16_t PDC; ///< Power down control register
stc_wm8731_pdc_field_t PDC_f;
};
union {
__IO uint16_t DAIF; ///< Digital audio interface format register
stc_wm8731_daif_field_t DAIF_f;
};
union {
__IO uint16_t SC; ///< Sampling control register
stc_wm8731_sc_field_t SC_f;
};
union {
__IO uint16_t AC; ///< Active control register
stc_wm8731_ac_field_t AC_f;
};
__IO uint16_t RESET; ///< Reset register
}stc_wm8731_reg_t;
/*******************************************************************************
* Global variable definitions ('extern')
******************************************************************************/
/*******************************************************************************
* Global function prototypes (definition in C source)
******************************************************************************/
en_result_t WM8731_Init(M4_I2C_TypeDef* pstcI2c, stc_wm8731_reg_t* pstcReg);
en_result_t WM8731_SetHpVolume(M4_I2C_TypeDef* pstcI2c, uint16_t u16LeftVol, uint16_t u16RightVol);
//@} // Wm8731Group
#ifdef __cplusplus
}
#endif
#endif /* __WM8731_H__ */
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/

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/*******************************************************************************
* Copyright (C) 2016, Huada Semiconductor Co., Ltd. All rights reserved.
*
* This software is owned and published by:
* Huada Semiconductor Co., Ltd. ("HDSC").
*
* BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
* BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
*
* This software contains source code for use with HDSC
* components. This software is licensed by HDSC to be adapted only
* for use in systems utilizing HDSC components. HDSC shall not be
* responsible for misuse or illegal use of this software for devices not
* supported herein. HDSC is providing this software "AS IS" and will
* not be responsible for issues arising from incorrect user implementation
* of the software.
*
* Disclaimer:
* HDSC MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
* REGARDING THE SOFTWARE (INCLUDING ANY ACCOMPANYING WRITTEN MATERIALS),
* ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
* WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
* WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
* WARRANTY OF NONINFRINGEMENT.
* HDSC SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
* NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
* LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
* LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
* INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
* SAVINGS OR PROFITS,
* EVEN IF Disclaimer HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
* INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
* FROM, THE SOFTWARE.
*
* This software may be replicated in part or whole for the licensed use,
* with the restriction that this Disclaimer and Copyright notice must be
* included with each copy of this software, whether used in part or whole,
* at all times.
*/
/******************************************************************************/
/** \file wm8731.c
**
** \brief I2S codec WM8731 driver API functions
**
** - 2018-11-13 1.0 Wangmin First version for Device Driver Library
**
******************************************************************************/
/*******************************************************************************
* Include files
******************************************************************************/
#include "hc32_ddl.h"
#include "wm8731.h"
/*******************************************************************************
* Local type definitions ('typedef')
******************************************************************************/
/*******************************************************************************
* Local pre-processor symbols/macros ('#define')
******************************************************************************/
#define TIMEOUT (0x10000ul)
#define I2C_ADDRESS_W (0x00u)
#define I2C_ADDRESS_R (0x01u)
/*******************************************************************************
* Global variable definitions (declared in header file with 'extern')
******************************************************************************/
/*******************************************************************************
* Local function prototypes ('static')
******************************************************************************/
/*******************************************************************************
* Local variable definitions ('static')
******************************************************************************/
static uint16_t u16LeftHpOut, u16RightHpOut;
/*******************************************************************************
* Function implementation - global ('extern') and local ('static')
******************************************************************************/
/**
******************************************************************************
** \brief Send command to WM8731
**
** \param pstcI2c Pointer to the I2C peripheral register, can
** be M4_I2C1,M4_I2C2 or M4_I2C3.
** \param u8RegAddr Regist address
** \param u16Cmd Command data
** \retval Process result
** - Ok Coded initial success
** - Error Coded initial faild
******************************************************************************/
en_result_t WM8731_SendCmd(M4_I2C_TypeDef* pstcI2c, uint8_t u8RegAddr, uint16_t u16Cmd)
{
// B[15:9] Are Control Address Bits
// B[8:0] Are Control Data Bits
uint8_t u8Data[2];
uint8_t stat = 0u;
en_result_t enRes = Ok;
u8Data[0] = (uint8_t)(((uint16_t)u8RegAddr << 1u) | ((u16Cmd>>8) & 0x1u));
u8Data[1] = (uint8_t)(u16Cmd & 0xFFu);
while (1)
{
switch (stat)
{
case 0u: // start condition
if (Ok == I2C_Start(pstcI2c, TIMEOUT))
{
stat = 1u;
}
else
{
stat = 0xffu;
enRes = Error;
}
break;
case 1u: // device address
if (Ok == I2C_TransAddr(pstcI2c, WM8731_ADDRESS, I2CDirTrans, TIMEOUT))
{
stat = 2u;
}
else
{
stat = 0xffu;
enRes = Error;
}
break;
case 2u: // send command
if (Ok == I2C_TransData(pstcI2c, u8Data, 2ul, TIMEOUT))
{
stat = 3u;
}
else
{
stat = 0xffu;
enRes = Error;
}
break;
case 3u: // stop condition
if (Ok == I2C_Stop(pstcI2c, TIMEOUT))
{
stat = 0xffu;
enRes = Ok;
}
else
{
stat = 0xffu;
enRes = Error;
}
break;
default:
// return enRes;
break;
}
if (0xffu == stat)
{
break;
}
}
return enRes;
}
/**
******************************************************************************
** \brief Initialize WM8731
**
** \param pstcI2c Pointer to the I2C peripheral register, can
** be M4_I2C1,M4_I2C2 or M4_I2C3.
** \param pstcReg Pointer to structure which define the register configuration
**
** \retval Process result
** - Error
** - Ok
******************************************************************************/
en_result_t WM8731_Init(M4_I2C_TypeDef* pstcI2c, stc_wm8731_reg_t* pstcReg)
{
stc_i2c_init_t stcI2cInit;
stc_clk_freq_t stcClkFreq;
en_result_t enRet;
I2C_DeInit(pstcI2c);
/* Get system clock frequency */
CLK_GetClockFreq(&stcClkFreq);
MEM_ZERO_STRUCT(stcI2cInit);
stcI2cInit.u32Pclk3 = stcClkFreq.pclk3Freq;
stcI2cInit.u32Baudrate = 100000u;
enRet = I2C_Init(pstcI2c, &stcI2cInit);
if(enRet == Ok)
{
I2C_Cmd(pstcI2c, Enable);
WM8731_SendCmd(pstcI2c, WM8731_REG_RESET, pstcReg->RESET); // Reset module
WM8731_SendCmd(pstcI2c, WM8731_REG_LLINE_IN, pstcReg->LLIN); // Left line in settings
WM8731_SendCmd(pstcI2c, WM8731_REG_RLINE_IN, pstcReg->RLIN); // Rigth line in settings
WM8731_SendCmd(pstcI2c, WM8731_REG_LHPHONE_OUT, pstcReg->LHOUT); // Left headphone out settings
WM8731_SendCmd(pstcI2c, WM8731_REG_RHPHONE_OUT, pstcReg->RHOUT); // Right headphone out settings
WM8731_SendCmd(pstcI2c, WM8731_REG_ANALOG_PATH, pstcReg->AAPC); // Analog paths
WM8731_SendCmd(pstcI2c, WM8731_REG_DIGITAL_PATH, pstcReg->DAPC); // Digital paths
WM8731_SendCmd(pstcI2c, WM8731_REG_PDOWN_CTRL, pstcReg->PDC); // Power down control
WM8731_SendCmd(pstcI2c, WM8731_REG_DIGITAL_IF, pstcReg->DAIF); // Digital interface
WM8731_SendCmd(pstcI2c, WM8731_REG_SAMPLING_CTRL, pstcReg->SC); // Sampling control
WM8731_SendCmd(pstcI2c, WM8731_REG_ACTIVE_CTRL, pstcReg->AC); // Activate module
u16LeftHpOut = pstcReg->LHOUT; // Store left headphone out data
u16RightHpOut = pstcReg->RHOUT; // Store right headphone out data
}
return enRet;
}
/**
******************************************************************************
** \brief Set volume of headphone
**
** \param pstcI2c Pointer to the I2C peripheral register, can
** be M4_I2C1,M4_I2C2 or M4_I2C3.
** \param u16LeftVol Left channel volume
** \param u16RightVol Right channel volume
** \retval Process result
** - Ok Set operation success
** - Error Set operation faild
******************************************************************************/
en_result_t WM8731_SetHpVolume(M4_I2C_TypeDef* pstcI2c, uint16_t u16LeftVol, uint16_t u16RightVol)
{
u16LeftHpOut = u16LeftHpOut & 0xC0u;
u16RightHpOut = u16RightHpOut & 0xC0u;
en_result_t enRet;
u16LeftHpOut |= u16LeftVol;
u16RightHpOut |= u16RightVol;
enRet = WM8731_SendCmd(pstcI2c, WM8731_REG_LHPHONE_OUT, u16LeftHpOut);
enRet = WM8731_SendCmd(pstcI2c, WM8731_REG_RHPHONE_OUT, u16RightHpOut);
return enRet;
}
/*******************************************************************************
* EOF (not truncated)
******************************************************************************/